[U-Boot] [PATCH v4 00/28] *** SUBJECT HERE ***

[Marek Vasut]

On 01/10/2017 06:20 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee <tien.fong.chee at intel.com>
> 
> *** BLURB HERE ***

Please at least fill the blanks next time ... :)

> Tien Fong Chee (28):
>   arm: socfpga: arria10: add additional i2c nodes for Arria10
>   arm: socfpga: arria10: add sdram defines for Arria10
>   arm: socfpga: arria10: add board files for the Arria10 SoCDK
>   arm: socfpga: arria10: add system manager defines
>   arm: socfpga: arria10: add misc functions for Arria10
>   arm: socfpga: arria10: add socfpga_arria10_socdk config
>   arm: socfpga: arria10: add socfpga_arria10_defconfig
>   arm: socfpga: arria10: add config option build for arria10
>   arm: socfpga: add define for bootinfo bsel bit shift
>   arm: socfpga: arria10: add reset manager for Arria10
>   arm: socfpga: wrap system manager functions for A5/C5 devices
>   arm: socfpga: arria10: don't build GEN5 sdram for arria10
>   arm: socfpga: arria10 fpga does not have bridges mapped
>   arm: socfpga: arria10: remove board_init and s_init
>   arm: socfpga: combine clrbits/setbits into a single clrsetbits
>   arm: socfpga: add reset manager defines for Arria10
>   arm: socfpga: arria10: update dwmac reset function to support Arria10
>   ARM:dts: Added device tree for socfpga arria10 development kit sdmmc
>   arm: socfpga: arria10: Enable SPL for Arria 10
>   arm: socfpga: arria10: Added clock manager and pin mux compat macro
>   arm: socfpga: arria10: Added some hardware base address for Arria 10
>   arm: socfpga: arria10: Added support for Arria 10 socdk
>   arm: socfpga: arria10: Added drivers for Arria10 Reset Manager
>   arm: socfpga: arria10: Added miscellaneous drivers for Arria 10
>   arm: socfpga: arria10: Added drivers for Arria10 clock manager
>   arm: socfpga: arria10: Added drivers for Arria10 pinmux/pins
>     configuration
>   arm: socfpga: arria10: Added Arria10 critical HW initialization to spl
>   arm: socfpga: arria10: Enable fpga driver build for SPL.
> 
>  arch/arm/dts/Makefile                              |   3 +-
>  arch/arm/dts/socfpga_arria10.dtsi                  | 859 +++++++++++++++++++
>  arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts       |  30 +
>  .../dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi   | 479 +++++++++++
>  arch/arm/mach-socfpga/Kconfig                      |  10 +
>  arch/arm/mach-socfpga/Makefile                     |  18 +-
>  arch/arm/mach-socfpga/clock_manager.c              | 752 +++++++---------
>  arch/arm/mach-socfpga/clock_manager_arria10.c      | 954 +++++++++++++++++++++
>  .../{clock_manager.c => clock_manager_gen5.c}      | 240 +-----
>  arch/arm/mach-socfpga/include/mach/base_addr_a10.h |   8 +-
>  arch/arm/mach-socfpga/include/mach/clock_manager.h | 356 ++++++--
>  arch/arm/mach-socfpga/include/mach/misc.h          |  32 +
>  arch/arm/mach-socfpga/include/mach/pinmux.h        |  17 +
>  arch/arm/mach-socfpga/include/mach/reset_manager.h | 152 +++-
>  arch/arm/mach-socfpga/include/mach/sdram_a10.h     | 380 ++++++++
>  .../arm/mach-socfpga/include/mach/system_manager.h | 122 +++
>  arch/arm/mach-socfpga/misc.c                       | 367 +-------
>  arch/arm/mach-socfpga/misc_arria10.c               | 255 ++++++
>  arch/arm/mach-socfpga/{misc.c => misc_gen5.c}      | 178 +---
>  arch/arm/mach-socfpga/pinmux.c                     | 104 +++
>  arch/arm/mach-socfpga/reset_manager.c              |  90 +-
>  arch/arm/mach-socfpga/reset_manager_arria10.c      | 407 +++++++++
>  .../{reset_manager.c => reset_manager_gen5.c}      |  82 +-
>  arch/arm/mach-socfpga/spl.c                        |  79 +-
>  arch/arm/mach-socfpga/system_manager.c             |   6 +-
>  board/altera/arria10-socdk/Kconfig                 |  18 +
>  board/altera/arria10-socdk/Makefile                |   7 +
>  board/altera/arria10-socdk/socfpga.c               |   7 +
>  configs/socfpga_arria10_defconfig                  |  24 +
>  drivers/Kconfig                                    |   2 +
>  drivers/Makefile                                   |   2 +-
>  drivers/ddr/Kconfig                                |   1 +
>  drivers/ddr/altera/Kconfig                         |   6 +
>  drivers/fpga/socfpga.c                             |   9 +-
>  include/configs/socfpga_arria10_socdk.h            | 106 +++
>  include/configs/socfpga_common.h                   |  38 +-
>  include/dt-bindings/reset/altr,rst-mgr-a10.h       | 103 +++
>  include/fdtdec.h                                   |   8 +
>  lib/fdtdec.c                                       |   8 +
>  39 files changed, 4937 insertions(+), 1382 deletions(-)
>  create mode 100644 arch/arm/dts/socfpga_arria10.dtsi
>  create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
>  create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi
>  create mode 100644 arch/arm/mach-socfpga/clock_manager_arria10.c
>  copy arch/arm/mach-socfpga/{clock_manager.c => clock_manager_gen5.c} (62%)
>  create mode 100644 arch/arm/mach-socfpga/include/mach/misc.h
>  create mode 100644 arch/arm/mach-socfpga/include/mach/pinmux.h
>  create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_a10.h
>  create mode 100644 arch/arm/mach-socfpga/misc_arria10.c
>  copy arch/arm/mach-socfpga/{misc.c => misc_gen5.c} (73%)
>  create mode 100644 arch/arm/mach-socfpga/pinmux.c
>  create mode 100644 arch/arm/mach-socfpga/reset_manager_arria10.c
>  copy arch/arm/mach-socfpga/{reset_manager.c => reset_manager_gen5.c} (67%)
>  create mode 100644 board/altera/arria10-socdk/Kconfig
>  create mode 100644 board/altera/arria10-socdk/Makefile
>  create mode 100644 board/altera/arria10-socdk/socfpga.c
>  create mode 100644 configs/socfpga_arria10_defconfig
>  create mode 100644 drivers/ddr/Kconfig
>  create mode 100644 drivers/ddr/altera/Kconfig
>  create mode 100644 include/configs/socfpga_arria10_socdk.h
>  create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10.h
> 


-- 
Best regards,
Marek Vasut