[U-Boot] [PATCH v3 2/9] ARM: DTS: stm32: add stm32f746-disco device tree files

[Marek Vasut]

On 11/24/2016 08:10 PM, Michael Kurz wrote:
> This patch adds the DTS source files needed for stm32f746-disco board
> The files are based on the stm32f429/469 files from current linux
> kernel.
> 
> Signed-off-by: Michael Kurz <michi.kurz at gmail.com>
> Acked-by: Vikas MANOCHA <vikas.manocha at st.com>
> 
> ---
> 
> Changes in v3:
> - Split pin control files of from device tree patch
> - Add Acked-by tag to 'add stm32f746-disco device tree files'
> 
> Changes in v2: None
> 
>  arch/arm/dts/Makefile             |   2 +
>  arch/arm/dts/armv7-m.dtsi         |  24 +++
>  arch/arm/dts/stm32f746-disco.dts  | 154 +++++++++++++++
>  arch/arm/dts/stm32f746.dtsi       | 397 ++++++++++++++++++++++++++++++++++++++
>  configs/stm32f746-disco_defconfig |   1 +
>  5 files changed, 578 insertions(+)
>  create mode 100644 arch/arm/dts/armv7-m.dtsi
>  create mode 100644 arch/arm/dts/stm32f746-disco.dts
>  create mode 100644 arch/arm/dts/stm32f746.dtsi
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 2c5b2f2..b340f82 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -157,6 +157,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
>  
>  dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb
>  
> +dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb
> +
>  dtb-$(CONFIG_MACH_SUN4I) += \
>  	sun4i-a10-a1000.dtb \
>  	sun4i-a10-ba10-tvbox.dtb \
> diff --git a/arch/arm/dts/armv7-m.dtsi b/arch/arm/dts/armv7-m.dtsi
> new file mode 100644
> index 0000000..e0a6bf2
> --- /dev/null
> +++ b/arch/arm/dts/armv7-m.dtsi
> @@ -0,0 +1,24 @@

License is missing ?

> +#include "skeleton.dtsi"
> +
> +/ {
> +	nvic: interrupt-controller at e000e100  {

[...]

> +};
> \ No newline at end of file

Please fix ^^^

> diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
> new file mode 100644
> index 0000000..7b652f0
> --- /dev/null
> +++ b/arch/arm/dts/stm32f746-disco.dts


[...]

> +&mac {
> +	status = "okay";
> +	pinctrl-0	= <&ethernet_pins_disco>;
> +	pinctrl-names	= "default";
> +	phy-mode	= "rmii";
> +	phy-handle	= <&phy0>;

Keep the formating consistent, aka "prop = <foo>;" without any tabs
before =.

> +	mdio0 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "snps,dwmac-mdio";
> +		phy0: ethernet-phy at 0 {
> +			reg = <0>;
> +		};
> +	};
> +};

[...]

> +		qspi: quadspi at A0001000 {
> +			compatible = "st,stm32-qspi";
> +			#address-cells = <1>;
> +			#size-cells = <0>;

Is the controller compatible with cadence QSPI ? I believe it is.

-- 
Best regards,
Marek Vasut