[U-Boot] [U-Boot-Users]

[Rahul.Shinde at Emerson.com]

Hi,

I have a query regarding SDRAM initialization part in U boot code.

In Initdram function after prerecharge all bank command is delay required or reading from particular address is required?

In our u boot code see below part highlighted in GREEN color is added after precharge all bank command, We don't know actual purpose of that commands after precharge all bank command.

long int initdram (int board_type)
{
  volatile unsigned long *pdata;
  volatile unsigned short *pdatashort;
  volatile unsigned char *pdatachar;

  volatile char tmpchar;
  volatile long i;
  volatile unsigned long tmplong;
  volatile ioport_t *iopc;
  volatile unsigned int data = 0;
  volatile unsigned char boardRev = 0;
     volatile int msize;


     // Check board rev
  iopc = ioport_addr((immap_t *)CFG_IMMR, 2 /* port C */);

  /* THIS IS IMPORTANT. DON'T TAKE THIS LOOP OUT AT ANY COST!
     Rev A CPU boards have Rev input pins that are floating in the air. When we change the
     GPIO assignment to input, these pins change from reading all 0's to all 1's! So the
     following loops gives us enough settling time before the startup script reads the board
     revision to determine what drivers to load.
  */
  for (i = 0; i < 64; ++i)
     {
       //Port C 22, 23, 27, 31 - Bit 22 Most Significant, Bit 31 Least Significant
       data = iopc->pdat;
       boardRev = (unsigned char)( (data & 0x00000001) | ((data >> 3) & 0x00000002) | ((data >> 6) & 0x0000000C) );
     }

    //*************************************************************
     //  initialize - PSDRAM  BR3 & OR3
     //
     //  PSDRAM OR = FE002EC0 (32 Mbyte)
     //  PSDRAM OR = FC002CC0 (64 Mbyte)
     //  PSDRAM OR = F8002B00 (128 Mbyte)
     //  PSDRAM OR = F0002900 (256 Mbyte)
     //
     //*************************************************************
     //kf set {unsigned long} 0xf001011c=0xfc002d10
     pdata = (unsigned long *) 0xf0010118;                            //BR3
     *pdata =0x00001841;
     #ifdef _64MB_SDRAM
           pdata = (unsigned long *) 0xf001011c;                      //OR3
           *pdata =0xfc002d10;
     #else
          pdata = (unsigned long *) 0xf001011c;                      //OR3
           *pdata =0xf8002B00;
     #endif

     // Check Board Rev and do initialization...
     if (boardRev == 0x7)                            //256Mbyte SDRAM
     {
           msize = 256;
           pdata = (unsigned long *) 0xf0010138;            //BR7
           *pdata =0x08001841;
           pdata = (unsigned long *) 0xf001013c;            //OR7
           *pdata =0xf8002B00;
     }
     else                                                                 //128Mbyte SDRAM
     {
           #ifdef _64MB_SDRAM
                msize = 64;
           #else
                msize = 128;
           #endif
     }

     //*************************************************************
  //  program the MPTPR -
  //*************************************************************
  pdatashort = (unsigned short *) 0xf0010184;
  *pdatashort = (unsigned short)0x1f00;

  //*************************************************************
  //  SDRAM Initialization
  //*************************************************************
  //wait 100us before accessing

  for(i = 0; i < 25000; i ++);


  //*************************************************************
  //  initialize  - PSDRAM mode reg (PSDMR)
  //
  //  C2CA2462 (32 Mbyte)
  //  C34E2462 (64 Mbyte)
  //  C3AE2462 (128 Mbyte)
  //  C4322462 (256 Mbyte)
 //
  //*************************************************************
  //kf set {unsigned long} 0xf0010190=0xC3A9A522
  pdata = (unsigned long *) 0xf0010190;
#ifdef _64MB_SDRAM
  *pdata =0xC349A522;
#else
  *pdata =0xC44DA522;
#endif

  //*************************************************************
  //  program PSRT - PSDRAM refresh timer
  //
  //  0x64 (32 Mbyte)
  //  0x64 (64 Mbyte)
  //  0x32 (128 Mbyte)
  //  0x32 (256 Mbyte)
  //
  //*************************************************************
  //byte 0xf001019C = 0x64
  //kf byte 0xf001019C = 0x32
  pdatachar = (unsigned char *) 0xf001019C;
#ifdef _64MB_SDRAM
  *pdatachar = 0x06; //???why? From Bench! why? -Vipin
#else
  //  *pdatachar = 0x0F; //should refresh 8192 lines in 64ms w/ 66Mhz bus
  *pdatachar = 0x06; //should refresh 8192 lines in 64ms w/ 66Mhz bus
#endif

  //*************************************************************
  //  SDRAM Initialization
  //*************************************************************
  //wait 100us before accessing



  for(i = 0; i < 25000; i ++);


  //Precharge all banks           SMMR[OP]=101
  pdatachar = (unsigned char *) 0xf0010190;
#ifdef _64MB_SDRAM
  *pdatachar = 0xeb; //1110 1011
#else
  *pdatachar = 0xec; //1110 1100
#endif

  /*
    print {unsigned char} 0x00000110
    print {unsigned char} 0x00000023

  */
  //Important!! Must do the following two byte reads from the stated address
  //to complete SDRAM init.
  pdatachar = (unsigned char *)0x00000110;
  tmpchar = *pdatachar;

 pdatachar = (unsigned char *)0x00000023;
  tmpchar = *pdatachar;

     if (boardRev == 0x7)                            //256Mbyte SDRAM
     {
           pdatachar = (unsigned char *)0x08000110;
           tmpchar = *pdatachar;
           pdatachar = (unsigned char *)0x08000023;
           tmpchar = *pdatachar;
     }

#ifdef _64MB_SDRAM
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcb;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcb;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcb;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcb;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcb;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcb;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcb;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcb;

#else
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcc;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcc;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcc;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcc;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcc;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcc;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcc;
  pdatachar = (unsigned char *) 0xf0010190;
  *pdatachar = 0xcc;
#endif


  pdatachar = (unsigned char *) 0x00000023;
  *pdatachar = 0xff;

     if (boardRev == 0x7)                            //256Mbyte SDRAM
     {
           pdatachar = (unsigned char *) 0x08000023;
           *pdatachar = 0xff;
     }

  //Issue Mode set command        SMMR[OP]=011

  pdatachar = (unsigned char *) 0xf0010190;
#ifdef _64MB_SDRAM
  *pdatachar = 0xdb;
#else
  *pdatachar = 0xdc;
#endif


  //kf byte 0x00000110

  pdatachar = (unsigned char *)0x00000023;
  tmpchar = *pdatachar;

     if (boardRev == 0x7)                            //256Mbyte SDRAM
     {
           pdatachar = (unsigned char *) 0x08000023;
           tmpchar = *pdatachar;
     }

  //set PSDMR for normal operation
  pdatachar = (unsigned char *) 0xf0010190;
#ifdef _64MB_SDRAM
  *pdatachar = 0xc3;
#else
  *pdatachar =0xC4;
#endif



  // monitor reg MSR=0
  //
  //kf half 0xfa000006 = 0x01c9
  //kf half 0xfa000006
  //kf
  //kf byte 0xfa00000f = 0x40

  //print {unsigned long} 0xf00101a8
  //print {unsigned long} 0xf00101a8
  //print {unsigned long} 0xf00101a8
  //need to do above? Oh well!
  pdata = (unsigned long *)0xf00101a8;
  tmplong = *pdata;
  tmplong = *pdata;
  tmplong = *pdata;

  //set {unsigned long} 0x0=0x55555555
  //print {unsigned long} 0x0
  //set {unsigned long} 0x0=0xaaaaaaaa
  //print {unsigned long} 0x0

  /* return total 60x bus SDRAM size */

  return (msize * 1024 * 1024);
}
Please let me know your comments?

Thanks,
Rahul Shinde