[U-Boot] [PATCHv7 1/2] armv8/ls1043a: fixup GIC offset for ls1043a rev1

[Z.Q. Hou]

Hi York,

Thanks a lot for your comments!

> -----Original Message-----
> From: york sun
> Sent: 2017年1月17日 7:44
> To: Z.Q. Hou <zhiqiang.hou at nxp.com>; u-boot at lists.denx.de;
> sjg at chromium.org; Mingkai Hu <mingkai.hu at nxp.com>
> Cc: Wenbin Song <wenbin.song at nxp.com>
> Subject: Re: [PATCHv7 1/2] armv8/ls1043a: fixup GIC offset for ls1043a rev1
> 
> On 01/13/2017 03:27 AM, Zhiqiang Hou wrote:
> 
> <snip>
> 
> > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > index c50894a..577f00c 100644
> > --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> > @@ -174,6 +174,30 @@
> >  /* Generic Interrupt Controller Definitions */
> >  #define GICD_BASE		0x01401000
> >  #define GICC_BASE		0x01402000
> > +#define GICH_BASE		0x01404000
> > +#define GICV_BASE		0x01406000
> > +#define GICD_SIZE		0x1000
> > +#define GICC_SIZE		0x2000
> > +#define GICH_SIZE		0x2000
> > +#define GICV_SIZE		0x2000
> > +#ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
> > +#define GICD_BASE_64K		0x01410000
> > +#define GICC_BASE_64K		0x01420000
> > +#define GICH_BASE_64K		0x01440000
> > +#define GICV_BASE_64K		0x01460000
> > +#define GICD_SIZE_64K		0x10000
> > +#define GICC_SIZE_64K		0x20000
> > +#define GICH_SIZE_64K		0x20000
> > +#define GICV_SIZE_64K		0x20000
> > +#endif
> > +
> > +#define DCFG_CCSR_SVR		0x1ee00a4
> > +#define REV1_0			0x10
> > +#define REV1_1			0x11
> > +#define GIC_ADDR_BIT		31
> > +#define SCFG_GIC400_ALIGN	0x1570188
> > +#define LS1043A_SVR		0x87920000
> 
> There is already a macro SVR_LS1043A defined in
> arch/arm/include/asm/arch-fsl-layerscape/soc.h. Can you use that instead?
> 

Yes, will remove the duplicated definition.

Thanks,
Zhiqiang