[U-Boot] [PATCH 10/12] aspeed: Common configuration parameters for aspeed boards

Maxim Sloyko maxims at google.com
Tue Jan 17 21:02:15 CET 2017


On Sat, Jan 14, 2017 at 9:14 AM, Simon Glass <sjg at chromium.org> wrote:

> Hi Maxim,
>
> On 4 January 2017 at 12:46, Maxim Sloyko <maxims at google.com> wrote:
> > Signed-off-by: Maxim Sloyko <maxims at google.com>
> > ---
> >
> >  include/configs/aspeed-common.h | 84 ++++++++++++++++++++++++++++++
> +++++++++++
> >  1 file changed, 84 insertions(+)
> >  create mode 100644 include/configs/aspeed-common.h
> >
> > diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-
> common.h
> > new file mode 100644
> > index 0000000000..c125e39e3f
> > --- /dev/null
> > +++ b/include/configs/aspeed-common.h
> > @@ -0,0 +1,84 @@
> > +/*
> > + * Copyright (C) 2012-2020  ASPEED Technology Inc.
> > + * Ryan Chen <ryan_chen at aspeedtech.com>
> > + *
> > + * Copyright 2016 IBM Corporation
> > + * (C) Copyright 2016 Google, Inc
> > + *
> > + * SPDX-License-Identifier:     GPL-2.0+
> > + */
> > +
> > +#ifndef __AST_COMMON_CONFIG_H
> > +#define __AST_COMMON_CONFIG_H
> > +
> > +/* Misc CPU related */
> > +#define CONFIG_CMDLINE_TAG
> > +#define CONFIG_SETUP_MEMORY_TAGS
> > +#define CONFIG_INITRD_TAG
> > +
> > +#define CONFIG_CMDLINE_EDITING         1
>
> Drop the '1' from this
>
> > +
> > +/* Enable cache controller */
> > +#define CONFIG_SYS_DCACHE_OFF          1
>
> and this
>
> > +
> > +#ifdef CONFIG_PRE_CON_BUF_SZ
> > +#define PRE_CON_RAM_SZ         CONFIG_PRE_CON_BUF_SZ
> > +#else
> > +#define PRE_CON_RAM_SZ 0
> > +#endif
>
> What is this for?
>

This is a local variable to offset the INIT_RAM_ADDR and INIT_RAM_SIZE
below by
the size of the PRE_CON_BUF_SZ. I'll put it inline for v4.


>
> > +
> > +#define CONFIG_SYS_SDRAM_BASE          0x80000000
> > +#define CONFIG_SYS_INIT_RAM_ADDR       (0x1e720000 + PRE_CON_RAM_SZ)
> > +#define CONFIG_SYS_INIT_RAM_SIZE       (36*1024 - PRE_CON_RAM_SZ)
> > +#define SYS_INIT_RAM_END               (CONFIG_SYS_INIT_RAM_ADDR \
> > +                                        + CONFIG_SYS_INIT_RAM_SIZE)
> > +#define CONFIG_SYS_INIT_SP_ADDR                (SYS_INIT_RAM_END \
> > +                                        - GENERATED_GBL_DATA_SIZE)
> > +#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE \
> > +                                        - GENERATED_GBL_DATA_SIZE)
>
> Those last two should not be needed
>

It does not compile without CONFIG_SYS_INIT_SP_ADDR set.
CONFIG_SYS_GBL_DATA_OFFSET dropped for v4.


>
> > +
> > +#define CONFIG_NR_DRAM_BANKS           1
> > +
> > +#define CONFIG_SYS_TEXT_BASE           0x00000000
> > +
> > +#define CONFIG_SYS_MALLOC_LEN          (32 << 20)
> > +
> > +/*
> > + * NS16550 Configuration
> > + */
> > +#define CONFIG_BAUDRATE                        115200
> > +
> > +/*
> > + * BOOTP options
> > + */
> > +#define CONFIG_BOOTP_BOOTFILESIZE
> > +#define CONFIG_BOOTP_BOOTPATH
> > +#define CONFIG_BOOTP_GATEWAY
> > +#define CONFIG_BOOTP_HOSTNAME
> > +#define CONFIG_BOOTP_SUBNETMASK
> > +
> > +/*
> > + * Miscellaneous configurable options
> > + */
> > +#define CONFIG_SYS_LONGHELP
> > +#define CONFIG_SYS_CBSIZE              256
> > +
> > +/* Print Buffer Size */
> > +#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE \
> > +                                        + sizeof(CONFIG_SYS_PROMPT) +
> 16)
> > +#define CONFIG_SYS_MAXARGS             16
> > +#define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
> > +
> > +#define CONFIG_BOOTARGS \
> > +               "console=ttyS4,115200n8" \
> > +               " root=/dev/ram rw"
> > +
> > +#define CONFIG_BOOTCOMMAND             "bootm 20080000 20300000"
> > +#define CONFIG_ENV_OVERWRITE
> > +
> > +#define CONFIG_EXTRA_ENV_SETTINGS \
> > +       "verify=yes\0"  \
> > +       "spi_dma=yes\0" \
> > +       ""
> > +
> > +#endif /* __AST_COMMON_CONFIG_H */
> > --
> > 2.11.0.390.gc69c2f50cf-goog
> >
>
> Regards,
> Simon
>



-- 
*M*axim *S*loyko


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