[U-Boot] How to test watchdog timer values and ensuring it is working as intended
brendan
brendan.ta at jacques.com.au
Thu Jan 19 00:46:17 CET 2017
Hello,
I am using an Freescale/nxp mx6solo and I want to test that the watchdog
timer is working as intended. I have enabled it on my board and have
confirmed it during boot
> U-Boot SPL 2015.04-g0f11429-dirty (Jan 18 2017 - 05:42:24)
>
> Part number: VSM-SOLO-102
> Assembly: AS151004858
> Date of production: 2016 Feb 08
> NAND : 512 MiB
>
>
> U-Boot 2015.04-g0f11429-dirty (Jan 18 2017 - 05:42:24)
>
> CPU: Freescale i.MX6SOLO rev1.2 at 792 MHz
> CPU: Temperature 53 C
> Reset cause: POR
> Board: Variscite VAR-SOM-MX6 SOM-Solo 792 MHz
>
*
> Watchdog enabled
*
> I2C: ready
> DRAM: 1 GiB
> NAND: 512 MiB
> MMC: FSL_SDHC: 0, FSL_SDHC: 1
> auto-detected panel VAR-WVGA MX6CB-R
> Display: VAR-WVGA MX6CB-R (800x480)
> UBI init error 22
> Error: no valid bmp image at 18100000
> In: serial
> Out: serial
> Err: serial
> eMMC: 3.5 GiB
> Net: using phy at 7
> FEC [PRIME]
> Normal Boot
> Hit any key to stop autoboot: 0
I have just initialised the watchdog and using the provided timeout values
in /drivers/watchdog/imx_watchdog.c which are
> void hw_watchdog_init(void)
> {
> struct watchdog_regs *wdog = (struct watchdog_regs
> *)WDOG1_BASE_ADDR;
> u16 timeout;
>
> /*
> * The timer watchdog can be set between
> * 0.5 and 128 Seconds. If not defined
> * in configuration file, sets 128 Seconds
> */
> #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
> #define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
> #endif
> timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
> writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS |
> SET_WCR_WT(timeout), &wdog->wcr);
> hw_watchdog_reset();
> }
> #endif
I want to confirm that this is working so I was wondering how I am able to
test that the system is not kicking the watchdog.
Thanks
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