[U-Boot] [PATCH] net: phy: dp83867: add support for MAC impedance configuration

Grygorii Strashko grygorii.strashko at ti.com
Thu Jan 19 23:33:03 CET 2017


Sry

CC:u-boot at lists.denx.de

On 01/19/2017 04:30 PM, Grygorii Strashko wrote:
> From: Mugunthan V N <mugunthanvnm at ti.com>
>
> Add support for programmable MAC impedance configuration and
> fix typo in DT impedance parameters names.
>
> Signed-off-by: Mugunthan V N <mugunthanvnm at ti.com>
> Signed-off-by: Grygorii Strashko <grygorii.strashko at ti.com>
> ---
>  arch/arm/dts/dra72-evm-revc.dts |  4 ++--
>  drivers/net/phy/ti.c            | 31 +++++++++++++++++++++++++++++++
>  2 files changed, 33 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/dts/dra72-evm-revc.dts b/arch/arm/dts/dra72-evm-revc.dts
> index 5a1bb34..bc814f1 100644
> --- a/arch/arm/dts/dra72-evm-revc.dts
> +++ b/arch/arm/dts/dra72-evm-revc.dts
> @@ -67,7 +67,7 @@
>  		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
>  		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
>  		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
> -		ti,min-output-imepdance;
> +		ti,min-output-impedance;
>  	};
>
>  	dp83867_1: ethernet-phy at 3 {
> @@ -75,6 +75,6 @@
>  		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
>  		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
>  		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
> -		ti,min-output-imepdance;
> +		ti,min-output-impedance;
>  	};
>  };
> diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
> index c55dd97..21b181a 100644
> --- a/drivers/net/phy/ti.c
> +++ b/drivers/net/phy/ti.c
> @@ -27,6 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
>  /* Extended Registers */
>  #define DP83867_RGMIICTL	0x0032
>  #define DP83867_RGMIIDCTL	0x0086
> +#define DP83867_IO_MUX_CFG	0x0170
>
>  #define DP83867_SW_RESET	BIT(15)
>  #define DP83867_SW_RESTART	BIT(14)
> @@ -84,10 +85,17 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define DEFAULT_TX_ID_DELAY	DP83867_RGMIIDCTL_2_75_NS
>  #define DEFAULT_FIFO_DEPTH	DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
>
> +/* IO_MUX_CFG bits */
> +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL	0x1f
> +
> +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX	0x0
> +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN	0x1f
> +
>  struct dp83867_private {
>  	int rx_id_delay;
>  	int tx_id_delay;
>  	int fifo_depth;
> +	int io_impedance;
>  };
>
>  /**
> @@ -166,6 +174,15 @@ static int dp83867_of_init(struct phy_device *phydev)
>  {
>  	struct dp83867_private *dp83867 = phydev->priv;
>  	struct udevice *dev = phydev->dev;
> +	int node = dev->of_offset;
> +	const void *fdt = gd->fdt_blob;
> +
> +	if (fdtdec_get_bool(fdt, node, "ti,max-output-impedance"))
> +		dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX;
> +	else if (fdtdec_get_bool(fdt, node, "ti,min-output-impedance"))
> +		dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN;
> +	else
> +		dp83867->io_impedance = -EINVAL;
>
>  	dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
>  				 "ti,rx-internal-delay", -1);
> @@ -186,6 +203,7 @@ static int dp83867_of_init(struct phy_device *phydev)
>  	dp83867->rx_id_delay = DEFAULT_RX_ID_DELAY;
>  	dp83867->tx_id_delay = DEFAULT_TX_ID_DELAY;
>  	dp83867->fifo_depth = DEFAULT_FIFO_DEPTH;
> +	dp83867->io_impedance = -EINVAL;
>
>  	return 0;
>  }
> @@ -269,6 +287,19 @@ static int dp83867_config(struct phy_device *phydev)
>
>  		phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,
>  				       DP83867_DEVADDR, phydev->addr, delay);
> +
> +		if (dp83867->io_impedance >= 0) {
> +			val = phy_read_mmd_indirect(phydev,
> +						    DP83867_IO_MUX_CFG,
> +						    DP83867_DEVADDR,
> +						    phydev->addr);
> +			val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
> +			val |= dp83867->io_impedance &
> +			       DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
> +			phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
> +					       DP83867_DEVADDR, phydev->addr,
> +					       val);
> +		}
>  	}
>
>  	genphy_config_aneg(phydev);
>

-- 
regards,
-grygorii


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