[U-Boot] [PATCH v4 2/9] ARM: DTS: stm32: add stm32f746-disco device tree files

Michael Kurz michi.kurz at gmail.com
Sun Jan 22 16:04:23 CET 2017


This patch adds the DTS source files needed for stm32f746-disco board
The files are based on the stm32f429/469 files from current linux
kernel.

Source for "arch/arm/dts/armv7-m.dtsi": Linux: "arch/arm/boot/dts/armv7-m.dtsi"

Signed-off-by: Michael Kurz <michi.kurz at gmail.com>
Acked-by: Vikas MANOCHA <vikas.manocha at st.com>

---

Changes in v4:
- Update to current master
- Fix missing newline at end of file
- Removed currently not used entries from dts file
- Add binding document for qspi driver
- Disable qspi quad interface in dts file here

Changes in v3:
- Split pin control files of from device tree patch
- Add Acked-by tag to 'add stm32f746-disco device tree files'

Changes in v2: None

 arch/arm/dts/Makefile                           |  2 +
 arch/arm/dts/armv7-m.dtsi                       | 25 +++++++
 arch/arm/dts/stm32f746-disco.dts                | 96 +++++++++++++++++++++++++
 arch/arm/dts/stm32f746.dtsi                     | 79 ++++++++++++++++++++
 configs/stm32f746-disco_defconfig               |  1 +
 doc/device-tree-bindings/spi/spi-stm32-qspi.txt | 39 ++++++++++
 6 files changed, 242 insertions(+)
 create mode 100644 arch/arm/dts/armv7-m.dtsi
 create mode 100644 arch/arm/dts/stm32f746-disco.dts
 create mode 100644 arch/arm/dts/stm32f746.dtsi
 create mode 100644 doc/device-tree-bindings/spi/spi-stm32-qspi.txt

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 66ea0b3..5abe158 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -165,6 +165,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
 
 dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb
 
+dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb
+
 dtb-$(CONFIG_MACH_SUN4I) += \
 	sun4i-a10-a1000.dtb \
 	sun4i-a10-ba10-tvbox.dtb \
diff --git a/arch/arm/dts/armv7-m.dtsi b/arch/arm/dts/armv7-m.dtsi
new file mode 100644
index 0000000..31349da
--- /dev/null
+++ b/arch/arm/dts/armv7-m.dtsi
@@ -0,0 +1,25 @@
+#include "skeleton.dtsi"
+
+/ {
+	nvic: interrupt-controller at e000e100  {
+		compatible = "arm,armv7m-nvic";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		reg = <0xe000e100 0xc00>;
+	};
+
+	systick: timer at e000e010 {
+		compatible = "arm,armv7m-systick";
+		reg = <0xe000e010 0x10>;
+		status = "disabled";
+	};
+
+	soc {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		interrupt-parent = <&nvic>;
+		ranges;
+	};
+};
+
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
new file mode 100644
index 0000000..bad0698
--- /dev/null
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -0,0 +1,96 @@
+/*
+ * Copyright 2016 - Michael Kurz <michi.kurz at gmail.com>
+ *
+ * Based on:
+ * stm32f469-disco.dts from Linux
+ * Copyright 2016 - Lee Jones <lee.jones at linaro.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "stm32f746.dtsi"
+
+/ {
+	model = "STMicroelectronics STM32F746-DISCO board";
+	compatible = "st,stm32f746-disco", "st,stm32f746";
+
+	chosen {
+		bootargs = "root=/dev/ram rdinit=/linuxrc";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		reg = <0xC0000000 0x800000>;
+	};
+
+	aliases {
+		spi0 = &qspi;
+	};
+};
+
+&mac {
+	status = "okay";
+	phy-mode = "rmii";
+	phy-handle = <&phy0>;
+
+	mdio0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+		phy0: ethernet-phy at 0 {
+			reg = <0>;
+		};
+	};
+};
+
+&qspi {
+	status = "okay";
+
+	qflash0: n25q128a {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "micron,n25q128a13", "spi-flash";
+			spi-max-frequency = <108000000>;
+			spi-tx-bus-width = <1>;
+			spi-rx-bus-width = <1>;
+			memory-map = <0x90000000 0x1000000>;
+			reg = <0>;
+	};
+};
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
new file mode 100644
index 0000000..3902e76
--- /dev/null
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -0,0 +1,79 @@
+/*
+ * Copyright 2016 - Michael Kurz <michi.kurz at gmail.com>
+ *
+ * Based on:
+ * stm32f429.dtsi from Linux
+ * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32 at gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "armv7-m.dtsi"
+#include <dt-bindings/pinctrl/stm32f746-pinfunc.h>
+
+/ {
+	soc {
+		mac: ethernet at 40028000 {
+			compatible = "st,stm32-dwmac";
+			reg = <0x40028000 0x8000>;
+			reg-names = "stmmaceth";
+			interrupts = <61>, <62>;
+			interrupt-names = "macirq", "eth_wake_irq";
+			snps,pbl = <8>;
+			snps,mixed-burst;
+			dma-ranges;
+			status = "disabled";
+		};
+
+		qspi: quadspi at A0001000 {
+			compatible = "st,stm32-qspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>;
+			reg-names = "QuadSPI", "QuadSPI-memory";
+			interrupts = <92>;
+			spi-max-frequency = <108000000>;
+			status = "disabled";
+		};
+	};
+};
+
+&systick {
+	status = "okay";
+};
diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index 55b9eba..424e750 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -3,6 +3,7 @@ CONFIG_STM32=y
 CONFIG_STM32F7=y
 CONFIG_TARGET_STM32F746_DISCO=y
 # CONFIG_MMC is not set
+CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco"
 CONFIG_BOOTDELAY=3
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/doc/device-tree-bindings/spi/spi-stm32-qspi.txt b/doc/device-tree-bindings/spi/spi-stm32-qspi.txt
new file mode 100644
index 0000000..6c7da1d
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-stm32-qspi.txt
@@ -0,0 +1,39 @@
+STM32 QSPI controller device tree bindings
+--------------------------------------------
+
+Required properties:
+- compatible		: should be "st,stm32-qspi".
+- reg			: 1. Physical base address and size of SPI registers map.
+			  2. Physical base address & size of mapped NOR Flash.
+- spi-max-frequency	: Max supported spi frequency.
+- status		: enable in requried dts.
+
+Connected flash properties
+--------------------------
+- spi-max-frequency	: Max supported spi frequency.
+- spi-tx-bus-width	: Bus width (number of lines) for writing (1-4)
+- spi-rx-bus-width	: Bus width (number of lines) for reading (1-4)
+- memory-map		: Address and size for memory-mapping the flash
+
+Example:
+	qspi: quadspi at A0001000 {
+		compatible = "st,stm32-qspi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>;
+		reg-names = "QuadSPI", "QuadSPI-memory";
+		interrupts = <92>;
+		spi-max-frequency = <108000000>;
+		status = "okay";
+
+		qflash0: n25q128a {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "micron,n25q128a13", "spi-flash";
+			spi-max-frequency = <108000000>;
+			spi-tx-bus-width = <4>;
+			spi-rx-bus-width = <4>;
+			memory-map = <0x90000000 0x1000000>;
+			reg = <0>;
+		};
+	};
-- 
2.1.4



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