[U-Boot] [PATCH v4 13/28] arm: socfpga: arria10 fpga does not have bridges mapped
Marek Vasut
marex at denx.de
Mon Jan 23 04:55:31 CET 2017
On 01/10/2017 06:20 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee <tien.fong.chee at intel.com>
>
> On the Arria10 device, the bridges are not mapped through the interconnect.
>
> Signed-off-by: Dinh Nguyen <dinguyen at opensource.altera.com>
> Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
> Cc: Marek Vasut <marex at denx.de>
> Cc: Dinh Nguyen <dinguyen at kernel.org>
> Cc: Chin Liang See <chin.liang.see at intel.com>
> Cc: Tien Fong <skywindctf at gmail.com>
> ---
> drivers/fpga/socfpga.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
> index f1b2f2c..bfefafd 100644
> --- a/drivers/fpga/socfpga.c
> +++ b/drivers/fpga/socfpga.c
> @@ -278,8 +278,10 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
> /* Disable all axi bridge (hps2fpga, lwhps2fpga & fpga2hps) */
> socfpga_bridges_reset(1);
>
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> /* Unmap the bridges from NIC-301 */
> writel(0x1, SOCFPGA_L3REGS_ADDRESS);
This bridge handling is also in SPL, so it should probably be extracted
into common function and the ifdef be contained therein.
> +#endif
>
> /* Initialize the FPGA Manager */
> status = fpgamgr_program_init();
>
--
Best regards,
Marek Vasut
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