[U-Boot] [PATCH 29/29] RFC: x86: Move link to use driver model for SCSI

[Simon Glass]

As a demonstration of how to use SCSI with driver model, move link over
to use this. This patch needs more work, but illustrates the concept.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 arch/x86/cpu/ivybridge/sata.c     | 38 +++++++++++++++++++++++++++++++++++++-
 configs/chromebook_link_defconfig |  2 ++
 2 files changed, 39 insertions(+), 1 deletion(-)

diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c
index 0f5e190425..5bbe65d442 100644
--- a/arch/x86/cpu/ivybridge/sata.c
+++ b/arch/x86/cpu/ivybridge/sata.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <ahci.h>
 #include <dm.h>
 #include <fdtdec.h>
 #include <asm/io.h>
@@ -208,6 +209,20 @@ static void bd82x6x_sata_enable(struct udevice *dev)
 	dm_pci_write_config16(dev, 0x90, map);
 }
 
+static int bd82x6x_sata_bind(struct udevice *dev)
+{
+	struct udevice *scsi_dev;
+	int ret;
+
+	if (gd->flags & GD_FLG_RELOC) {
+		ret = ahci_bind_scsi(dev, &scsi_dev);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 static int bd82x6x_sata_probe(struct udevice *dev)
 {
 	struct udevice *pch;
@@ -219,8 +234,12 @@ static int bd82x6x_sata_probe(struct udevice *dev)
 
 	if (!(gd->flags & GD_FLG_RELOC))
 		bd82x6x_sata_enable(dev);
-	else
+	else {
 		bd82x6x_sata_init(dev, pch);
+		ret = ahci_probe_scsi(dev);
+		if (ret)
+			return ret;
+	}
 
 	return 0;
 }
@@ -234,5 +253,22 @@ U_BOOT_DRIVER(ahci_ivybridge_drv) = {
 	.name		= "ahci_ivybridge",
 	.id		= UCLASS_AHCI,
 	.of_match	= bd82x6x_ahci_ids,
+	.bind		= bd82x6x_sata_bind,
 	.probe		= bd82x6x_sata_probe,
 };
+
+static struct pci_device_id chromebook_ssd_supported[] = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL,
+		     PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL,
+		     PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL,
+		     PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL,
+		     PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI) },
+	{},
+};
+
+U_BOOT_PCI_DEVICE(ahci_ivybridge_drv, chromebook_ssd_supported);
diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index a463270514..503581dfce 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -40,6 +40,8 @@ CONFIG_OF_CONTROL=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_BLK=y
 CONFIG_CPU=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_INTEL=y
-- 
2.13.0.506.g27d5fe0cd-goog