[U-Boot] [PATCH v3 07/10] usb: dwc2: force to host mode if HNP/SRP not support

[Meng Dongyang]

In current code, after running the command of "usb start", the controller
will keep in otg mode and can't switch to host mode if not support
SNP/SRP capability. So add the property of "hnp-srp-disable" in the DTS
to config the contrller work in force mode of host.

Signed-off-by: Meng Dongyang <daniel.meng at rock-chips.com>
---

Changes in v3:
- revert change of macro definition in dwc2 driver
- support host mode without HNP/SRP capability through DTS

Changes in v2:
- Splited from patch [07/08] of v1

 drivers/usb/host/dwc2.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 0e5df15..73a0290 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -43,6 +43,7 @@ struct dwc2_priv {
 	struct dwc2_core_regs *regs;
 	int root_hub_devnum;
 	bool ext_vbus;
+	bool hnp_srp_disable;
 	bool oc_disable;
 };
 
@@ -394,6 +395,9 @@ static void dwc_otg_core_init(struct dwc2_priv *priv)
 		usbcfg |= DWC2_GUSBCFG_ULPI_CLK_SUS_M;
 	}
 #endif
+	if (priv->hnp_srp_disable)
+		usbcfg |= DWC2_GUSBCFG_FORCEHOSTMODE;
+
 	writel(usbcfg, &regs->gusbcfg);
 
 	/* Program the GAHBCFG Register. */
@@ -423,7 +427,9 @@ static void dwc_otg_core_init(struct dwc2_priv *priv)
 	writel(ahbcfg, &regs->gahbcfg);
 
 	/* Program the GUSBCFG register for HNP/SRP. */
-	setbits_le32(&regs->gusbcfg, DWC2_GUSBCFG_HNPCAP | DWC2_GUSBCFG_SRPCAP);
+	if (!priv->hnp_srp_disable)
+		setbits_le32(&regs->gusbcfg,
+			     DWC2_GUSBCFG_HNPCAP | DWC2_GUSBCFG_SRPCAP);
 
 #ifdef CONFIG_DWC2_IC_USB_CAP
 	setbits_le32(&regs->gusbcfg, DWC2_GUSBCFG_IC_USB_CAP);
@@ -1244,6 +1250,11 @@ static int dwc2_usb_ofdata_to_platdata(struct udevice *dev)
 	if (prop)
 		priv->oc_disable = true;
 
+	prop = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
+			   "hnp-srp-disable", NULL);
+	if (prop)
+		priv->hnp_srp_disable = true;
+
 	return 0;
 }
 
-- 
1.9.1