[U-Boot] [PATCH v3 1/6] driver/ddr: Add support for setting timing in hws_topology_map

[Stefan Roese]

Hi Marek,

On 06.06.2017 14:19, Marek Behún wrote:
> Damn, I forgot to add the change Stefan suggested in this commit. It
> will be included in next version of the patches.

I was just writing a small comment. ;)

Thanks,
Stefan

> On Tue,  6 Jun 2017 14:04:32 +0200
> Marek Behun <marek.behun at nic.cz> wrote:
> 
>> From: Marek Behún <marek.behun at nic.cz>
>>
>> The DDR3 training code for Marvell A38X currently computes 1t timing
>> when given board topology map of the Turris Omnia, but Omnia needs 2t.
>>
>> This patch adds support for enforcing the 2t timing in struct
>> hws_topology_map, through a new enum hws_timing, which can assume
>> following values:
>>    HWS_TIM_DEFAULT - default behaviour, compute whether to enable 2t
>>                      from the number of CSs
>>    HWS_TIM_1T      - enforce 1t
>>    HWS_TIM_2T      - enforce 2t
>>
>> This patch also sets all the board topology maps (db-88f6820-amc,
>> db-88f6820-gp, controlcenterdc and clearfog) to have timing set to
>> HWS_TIM_DEFAULT.
>>
>> Signed-off-by: Marek Behun <marek.behun at nic.cz>
>>
>> diff --git a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
>> b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c index
>> cade99c8d7..40fa599865 100644 ---
>> a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c +++
>> b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c @@ -69,7 +69,8 @@
>> static struct hws_topology_map board_topology_map =
>> { MEM_4G,			/* mem_size */
>> DDR_FREQ_800,		/* frequency */ 0,
>> 0,			/* cas_l cas_wl */
>> -	    HWS_TEMP_LOW} },		/* temperature */
>> +	    HWS_TEMP_LOW,		/* temperature */
>> +	    HWS_TIM_DEFAULT} },		/* timing */
>>   	5,				/* Num Of Bus Per
>> Interface*/ BUS_MASK_32BIT			/* Busses mask */
>>   };
>> diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
>> b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c index
>> e700781103..a1974cb4bd 100644 ---
>> a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c +++
>> b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c @@ -90,7 +90,8 @@
>> static struct hws_topology_map board_topology_map =
>> { MEM_4G,			/* mem_size */
>> DDR_FREQ_800,		/* frequency */ 0,
>> 0,			/* cas_l cas_wl */
>> -	    HWS_TEMP_LOW} },		/* temperature */
>> +	    HWS_TEMP_LOW,		/* temperature */
>> +	    HWS_TIM_DEFAULT} },		/* timing */
>>   	5,				/* Num Of Bus Per
>> Interface*/ BUS_MASK_32BIT			/* Busses mask */
>>   };
>> diff --git a/board/gdsys/a38x/controlcenterdc.c
>> b/board/gdsys/a38x/controlcenterdc.c index f0efb53447..32168d3576
>> 100644 --- a/board/gdsys/a38x/controlcenterdc.c
>> +++ b/board/gdsys/a38x/controlcenterdc.c
>> @@ -53,7 +53,8 @@ static struct hws_topology_map ddr_topology_map = {
>>   	    MEM_4G,			/* mem_size */
>>   	    DDR_FREQ_533,		/* frequency */
>>   	    0, 0,			/* cas_l cas_wl */
>> -	    HWS_TEMP_LOW} },		/* temperature */
>> +	    HWS_TEMP_LOW,		/* temperature */
>> +	    HWS_TIM_DEFAULT} },		/* timing */
>>   	5,				/* Num Of Bus Per
>> Interface*/ BUS_MASK_32BIT			/* Busses mask */
>>   };
>> diff --git a/board/solidrun/clearfog/clearfog.c
>> b/board/solidrun/clearfog/clearfog.c index 3a8257cac3..8906636f76
>> 100644 --- a/board/solidrun/clearfog/clearfog.c
>> +++ b/board/solidrun/clearfog/clearfog.c
>> @@ -83,7 +83,8 @@ static struct hws_topology_map board_topology_map =
>> { MEM_4G,			/* mem_size */
>>   	    DDR_FREQ_800,		/* frequency */
>>   	    0, 0,			/* cas_l cas_wl */
>> -	    HWS_TEMP_LOW} },		/* temperature */
>> +	    HWS_TEMP_LOW,		/* temperature */
>> +	    HWS_TIM_DEFAULT} },		/* timing */
>>   	5,				/* Num Of Bus Per
>> Interface*/ BUS_MASK_32BIT			/* Busses mask */
>>   };
>> diff --git a/drivers/ddr/marvell/a38x/ddr3_training.c
>> b/drivers/ddr/marvell/a38x/ddr3_training.c index
>> 7e0749fde3..c79db6af5a 100644 ---
>> a/drivers/ddr/marvell/a38x/ddr3_training.c +++
>> b/drivers/ddr/marvell/a38x/ddr3_training.c @@ -571,6 +571,11 @@ int
>> hws_ddr3_tip_init_controller(u32 dev_num, struct init_cntr_param
>> *init_cntr_ if (mode2_t != 0xff) {
>>   				t2t = mode2_t;
>> +			} else if (tm->interface_params[if_id].
>> +				   timing != HWS_TIM_DEFAULT) {
>> +				/* Board topology map is forcing
>> timing */
>> +				t2t = (tm->interface_params[if_id].
>> +				       timing == HWS_TIM_2T) ? 1 : 0;
>>   			} else {
>>   				/* calculate number of CS (per
>> interface) */ CHECK_STATUS(calc_cs_num
>> diff --git a/drivers/ddr/marvell/a38x/ddr_topology_def.h
>> b/drivers/ddr/marvell/a38x/ddr_topology_def.h index
>> f8894e828a..229c3a127a 100644 ---
>> a/drivers/ddr/marvell/a38x/ddr_topology_def.h +++
>> b/drivers/ddr/marvell/a38x/ddr_topology_def.h @@ -37,6 +37,12 @@ enum
>> hws_mem_size { MEM_SIZE_LAST
>>   };
>>   
>> +enum hws_timing {
>> +	HWS_TIM_DEFAULT,
>> +	HWS_TIM_1T,
>> +	HWS_TIM_2T
>> +};
>> +
>>   struct bus_params {
>>   	/* Chip Select (CS) bitmask (bits 0-CS0, bit 1- CS1 ...) */
>>   	u8 cs_bitmask;
>> @@ -84,6 +90,9 @@ struct if_params {
>>   
>>   	/* operation temperature */
>>   	enum hws_temperature interface_temp;
>> +
>> +	/* 2T vs 1T mode (by default computed from number of CSs) */
>> +	enum hws_timing timing;
>>   };
>>   
>>   struct hws_topology_map {
> 

Viele Grüße,
Stefan

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