[U-Boot] [linux-sunxi] [RFC PATCH 6/8] sunxi: add multi-cluster CPU PRCM register definition

[Chen-Yu Tsai]

On Wed, Jun 7, 2017 at 8:47 AM, Icenowy Zheng <icenowy at aosc.io> wrote:
> A83T come with two clusters of CPU, for each cluster 1 the new registers
> are in the reserved spaces after the original cluster 0.
>
> Make the registers to have an array with length 2 (2 clusters), and
> change the current code to reference only cluster 0 registers.
>
> Signed-off-by: Icenowy Zheng <icenowy at aosc.io>
> ---
>  arch/arm/cpu/armv7/sunxi/psci.c        | 2 +-
>  arch/arm/include/asm/arch-sunxi/prcm.h | 8 ++++----
>  2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
> index b3a34de1aa..8caef6a85f 100644
> --- a/arch/arm/cpu/armv7/sunxi/psci.c
> +++ b/arch/arm/cpu/armv7/sunxi/psci.c
> @@ -144,7 +144,7 @@ static void __secure sunxi_cpu_set_power(int cpu, bool on)
>         struct sunxi_prcm_reg *prcm =
>                 (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
>
> -       sunxi_power_switch(&prcm->cpu_pwr_clamp[cpu], &prcm->cpu_pwroff,
> +       sunxi_power_switch(&prcm->cpu_pwr_clamp[0][cpu], &prcm->cpu_pwroff[0],
>                            on, cpu);
>  }
>  #endif /* CONFIG_MACH_SUN7I */
> diff --git a/arch/arm/include/asm/arch-sunxi/prcm.h b/arch/arm/include/asm/arch-sunxi/prcm.h
> index ae3880b13b..c2a6e39ffc 100644
> --- a/arch/arm/include/asm/arch-sunxi/prcm.h
> +++ b/arch/arm/include/asm/arch-sunxi/prcm.h
> @@ -220,16 +220,16 @@ struct __packed sunxi_prcm_reg {
>         u8 res5[0x3c];          /* 0x0b4 */
>         u32 clk_outd;           /* 0x0f0 */
>         u8 res6[0xc];           /* 0x0f4 */
> -       u32 cpu_pwroff;         /* 0x100 */
> -       u8 res7[0xc];           /* 0x104 */
> +       u32 cpu_pwroff[2];      /* 0x100 */
> +       u8 res7[0x8];           /* 0x108 */
>         u32 vdd_sys_pwroff;     /* 0x110 */
>         u8 res8[0x4];           /* 0x114 */
>         u32 gpu_pwroff;         /* 0x118 */
>         u8 res9[0x4];           /* 0x11c */
>         u32 vdd_pwr_reset;      /* 0x120 */
>         u8 res10[0x1c];         /* 0x124 */
> -       u32 cpu_pwr_clamp[4];   /* 0x140 but first one is actually unused */
> -       u8 res11[0x30];         /* 0x150 */
> +       u32 cpu_pwr_clamp[2][4];/* 0x140 but first one is actually unused */

The comment needs to be fixed. It only applies to the single cluster SoCs.

Otherwise,

Reviewed-by: Chen-Yu Tsai <wens at csie.org>

> +       u8 res11[0x20];         /* 0x160 */
>         u32 dram_pwr;           /* 0x180 */
>         u8 res12[0xc];          /* 0x184 */
>         u32 dram_tst;           /* 0x190 */
> --
> 2.12.2
>
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