[U-Boot] [PATCH] Fixup bug in PMIC TPS65217 register address definition
Lukasz Majewski
lukma at denx.de
Wed Jun 7 07:25:02 UTC 2017
On Tue, 6 Jun 2017 09:06:21 +0800
Brock Zheng Techyauld Ltd <yzheng at techyauld.com> wrote:
> The addresses of the registers in TI TPS65217 are not continuous.
> There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17
> register available.
>
> Fixup the enum values by adding a 'reserved' placeholder to
> correct the addresses higher than 0x17.
>
> Series-to: Heiko Schocher <hs at denx.de>
>
> Signed-off-by: Brock Zheng Techyauld Ltd <yzheng at techyauld.com>
> ---
>
> include/power/tps65217.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/power/tps65217.h b/include/power/tps65217.h
> index 69a49f76fe..cb07ea5ce6 100644
> --- a/include/power/tps65217.h
> +++ b/include/power/tps65217.h
> @@ -38,6 +38,7 @@ enum {
> TPS65217_DEFLS1,
> TPS65217_DEFLS2,
> TPS65217_ENABLE,
> + TPS65217_RESERVED0, /* no 0x17 register available */
> TPS65217_DEFUVLO,
> TPS65217_SEQ1,
> TPS65217_SEQ2,
Reviewed-by: Lukasz Majewski <lukma at denx.de>
Best regards,
Lukasz Majewski
--
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