[U-Boot] [PATCH 06/13] rockchip: rk3066: add core support

Paweł Jarosz paweljarosz3691 at gmail.com
Wed Jun 7 15:22:58 UTC 2017


Hi Simon


W dniu 06.06.2017 o 23:10, Simon Glass pisze:
> Hi Pawel,
>
> On 6 June 2017 at 12:50, Paweł Jarosz <paweljarosz3691 at gmail.com> wrote:
>> +#include <dm/test.h>
>> +#include <dm/util.h>
>> +#include <power/regulator.h>
>> +#include <syscon.h>
> That should go below spi.h
>
Ok
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +u32 spl_boot_device(void)
>> +{
> This function seems to be common. Can you please (in a separate patch)
> move it into a separate shared file and delete all the copies?
Ok
>
>> +
>> +       sdram_initialise();
> How come TPL is setting up the DRAM? Shouldn't that be done in SPL?
>
Due to size issues i needed to move spl load to sdram (not sram) and 
sdram settings
should be done by code executed in SRAM or you get to hang a board.
>> +
>> +       back_to_bootrom();
>> +}
>> diff --git a/arch/arm/mach-rockchip/rk3066-board.c b/arch/arm/mach-rockchip/rk3066-board.c
>> new file mode 100644
>> index 0000000..3d92253
>> --- /dev/null
>> +++ b/arch/arm/mach-rockchip/rk3066-board.c
>> @@ -0,0 +1,180 @@
>> +/*
>> + * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691 at gmail.com>
>> + *
>> + * SPDX-License-Identifier:     GPL-2.0+
>> + */
>> +
>> +#include <common.h>
>> +#include <clk.h>
>> +#include <dm.h>
>> +#include <ram.h>
>> +#include <syscon.h>
>> +#include <asm/io.h>
>> +#include <asm/arch/clock.h>
>> +#include <asm/arch/grf_rk3066.h>
>> +#include <asm/arch/periph.h>
>> +#include <asm/arch/pmu_rk3188.h>
>> +#include <asm/arch/boot_mode.h>
>> +#include <asm/gpio.h>
>> +#include <dm/pinctrl.h>
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +int board_late_init(void)
>> +{
>> +       struct rk3066_grf *grf;
>> +
>> +       grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
>> +       if (IS_ERR(grf)) {
>> +               error("grf syscon returned %ld\n", PTR_ERR(grf));
> debug() might be better here. Also please return the error so that it halts.
Ok
>> +       } else {
> Then drop this else because you will have returned by now.
Ok
>> +               /* enable noc remap to mimic legacy loaders */
>> +               rk_clrsetreg(&grf->soc_con0,
>> +                       NOC_REMAP_MASK << NOC_REMAP_SHIFT,
>> +                       NOC_REMAP_MASK << NOC_REMAP_SHIFT);
>> +       }
>> +
>> +       return 0;
>> +}
>> +
>> +int board_init(void)
>> +{
>> +#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
>> +       struct udevice *pinctrl;
>> +       int ret;
>> +
>> +       /*
>> +        * We need to implement sdcard iomux here for the further
>> +        * initialization, otherwise, it'll hit sdcard command sending
>> +        * timeout exception.
>> +        */
>> +       ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
>> +       if (ret) {
>> +               debug("%s: Cannot find pinctrl device\n", __func__);
>> +               goto err;
>> +       }
>> +       ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
>> +       if (ret) {
>> +               debug("%s: Failed to set up SD card\n", __func__);
>> +               goto err;
>> +       }
>> +
>> +       return 0;
>> +err:
>> +       printf("board_init: Error %d\n", ret);
>> +
>> +       /* No way to report error here */
>> +       hang();
>> +
>> +       return -1;
>> +#else
>> +       return 0;
>> +#endif
>> +}
>> +
>> +int dram_init(void)
>> +{
>> +       struct ram_info ram;
>> +       struct udevice *dev;
>> +       int ret;
>> +
>> +       ret = uclass_get_device(UCLASS_RAM, 0, &dev);
>> +       if (ret) {
>> +               debug("DRAM init failed: %d\n", ret);
>> +               return ret;
>> +       }
>> +       ret = ram_get_info(dev, &ram);
>> +       if (ret) {
>> +               debug("Cannot get DRAM size: %d\n", ret);
>> +               return ret;
>> +       }
>> +       debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
>> +       gd->ram_size = ram.size;
>> +
>> +       return 0;
>> +}
>> +
>> +#ifndef CONFIG_SYS_DCACHE_OFF
>> +void enable_caches(void)
>> +{
>> +       /* Enable D-cache. I-cache is already enabled in start.S */
>> +       dcache_enable();
>> +}
>> +#endif
>> +
>> +int print_cpuinfo (void)
>> +{
>> +       printf("CPU:   Rockchip RK3066\n");
>> +       return 0;
>> +}
>> +
>> +#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
>> +#include <usb.h>
>> +#include <usb/dwc2_udc.h>
>> +
>> +static struct dwc2_plat_otg_data rk3066_otg_data = {
>> +       .rx_fifo_sz     = 275,
>> +       .np_tx_fifo_sz  = 16,
>> +       .tx_fifo_sz     = 256,
>> +};
>> +
>> +int board_usb_init(int index, enum usb_init_type init)
>> +{
>> +       int node, phy_node;
>> +       const char *mode;
>> +       bool matched = false;
>> +       const void *blob = gd->fdt_blob;
>> +       u32 grf_phy_offset;
>> +
>> +       /* find the usb_otg node */
>> +       node = fdt_node_offset_by_compatible(blob, -1,
>> +                                       "rockchip,rk3066-usb");
> Can you please use live tree functions?  You'll need to add a separate
> patch to add this (see ofnode_path() for something simliar). Perhaps
> call it ofnode_by_compatible()?
>
> Ideally we should turn this into a driver so you can use dev_read_...
> functions. But that can come later.
>
>> +
>> +       while (node > 0) {
>> +               mode = fdt_getprop(blob, node, "dr_mode", NULL);
> This becomes ofnode_read_string()
>
>> +               if (mode && strcmp(mode, "otg") == 0) {
>> +                       matched = true;
>> +                       break;
>> +               }
>> +
>> +               node = fdt_node_offset_by_compatible(blob, node,
>> +                                       "rockchip,rk3066-usb")
>> +       }
>> +       if (!matched) {
>> +               debug("Not found usb_otg device\n");
>> +               return -ENODEV;
>> +       }
>> +       rk3066_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
> ofnode_get_addr
>
>> +
>> +       node = fdtdec_lookup_phandle(blob, node, "phys");
> etc.
>
>> +       if (node <= 0) {
>> +               debug("Not found usb phy device\n");
>> +               return -ENODEV;
>> +       }
>> +
>> +       phy_node = fdt_parent_offset(blob, node);
>> +       if (phy_node <= 0) {
>> +               debug("Not found usb phy device\n");
>> +               return -ENODEV;
>> +       }
>> +
>> +       rk3066_otg_data.phy_of_node = phy_node;
>> +       grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
>> +
>> +       node = fdt_node_offset_by_compatible(blob, -1,
>> +                                       "rockchip,rk3066-grf");
>> +       if (node <= 0) {
>> +               debug("Not found grf device\n");
>> +               return -ENODEV;
>> +       }
>> +       rk3066_otg_data.regs_phy = grf_phy_offset +
>> +                               fdtdec_get_addr(blob, node, "reg");
>> +
>> +       return dwc2_udc_probe(&rk3066_otg_data);
>> +}
>> +
>> +int board_usb_cleanup(int index, enum usb_init_type init)
>> +{
>> +       return 0;
>> +}
>> +#endif
>> diff --git a/arch/arm/mach-rockchip/rk3066/Kconfig b/arch/arm/mach-rockchip/rk3066/Kconfig
>> new file mode 100644
>> index 0000000..27d32fd
>> --- /dev/null
>> +++ b/arch/arm/mach-rockchip/rk3066/Kconfig
>> @@ -0,0 +1,34 @@
>> +if ROCKCHIP_RK3066
>> +
>> +config TARGET_MK808_RK3066
>> +        bool "MK808_RK3066"
>> +       help
>> +         MK808 is a tv stick with usb host and otg, microsd card slot, hdmi and wifi.
>> +
>> +config SYS_SOC
>> +        default "rockchip"
>> +
>> +config SYS_MALLOC_F_LEN
>> +        default 0x0800
>> +
>> +config SPL_LIBCOMMON_SUPPORT
> You should be able to add these as 'imply' options now (to the
> ROCKCHIP_RK3066 config)
>
What do you mean by 'imply' options?
>> +        default y
>> +
>> +config SPL_LIBGENERIC_SUPPORT
>> +        default y
>> +
>> +config SPL_SERIAL_SUPPORT
>> +        default y
>> +
>> +config TPL_LIBCOMMON_SUPPORT
>> +        default y
>> +
>> +config TPL_LIBGENERIC_SUPPORT
>> +        default y
>> +
>> +config TPL_SERIAL_SUPPORT
>> +        default y
>> +
>> +source "board/rikomagic/mk808_rk3066/Kconfig"
>> +
>> +endif
>> diff --git a/arch/arm/mach-rockchip/rk3066/Makefile b/arch/arm/mach-rockchip/rk3066/Makefile
>> new file mode 100644
>> index 0000000..4cf5df2
>> --- /dev/null
>> +++ b/arch/arm/mach-rockchip/rk3066/Makefile
>> @@ -0,0 +1,12 @@
>> +#
>> +# Copyright (c) 2017 Paweł Jarosz <paweljarosz3691 at gmail.com>
>> +#
>> +# SPDX-License-Identifier:      GPL-2.0+
>> +#
>> +
>> +ifndef CONFIG_TPL_BUILD
>> +obj-y += clk_rk3066.o
>> +obj-y += syscon_rk3066.o
>> +else
>> +obj-y += sdram_init.o
>> +endif
>> diff --git a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
>> new file mode 100644
>> index 0000000..ae52902
>> --- /dev/null
>> +++ b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
>> @@ -0,0 +1,33 @@
>> +/*
>> + * Copyright (C) 2016 Google, Inc
>> + * Written by Simon Glass <sjg at chromium.org>
>> + *
>> + * SPDX-License-Identifier:    GPL-2.0+
>> + */
>> +
>> +#include <common.h>
>> +#include <dm.h>
>> +#include <syscon.h>
>> +#include <asm/arch/clock.h>
>> +#include <asm/arch/cru_rk3066.h>
>> +
>> +int rockchip_get_clk(struct udevice **devp)
>> +{
>> +       return uclass_get_device_by_driver(UCLASS_CLK,
>> +                       DM_GET_DRIVER(rockchip_rk3066a_cru), devp);
>> +}
>> +
>> +void *rockchip_get_cru(void)
>> +{
>> +       struct rk3066_clk_priv *priv;
>> +       struct udevice *dev;
>> +       int ret;
>> +
>> +       ret = rockchip_get_clk(&dev);
>> +       if (ret)
>> +               return ERR_PTR(ret);
>> +
>> +       priv = dev_get_priv(dev);
>> +
>> +       return priv->cru;
>> +}
>> diff --git a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
>> new file mode 100644
>> index 0000000..57b2376
>> --- /dev/null
>> +++ b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
>> @@ -0,0 +1,54 @@
>> +/*
>> + * (C) Copyright 2015 Rockchip Electronics Co., Ltd
>> + *
>> + * SPDX-License-Identifier:     GPL-2.0+
>> + */
>> +
>> +#include <common.h>
>> +#include <dm.h>
>> +#include <syscon.h>
>> +#include <asm/arch/clock.h>
>> +
>> +static const struct udevice_id rk3066_syscon_ids[] = {
>> +       { .compatible = "rockchip,rk3188-noc", .data = ROCKCHIP_SYSCON_NOC },
>> +       { .compatible = "rockchip,rk3066-grf", .data = ROCKCHIP_SYSCON_GRF },
>> +       { .compatible = "rockchip,rk3066-pmu", .data = ROCKCHIP_SYSCON_PMU },
>> +       { }
>> +};
>> +
>> +U_BOOT_DRIVER(syscon_rk3066) = {
>> +       .name = "rk3066_syscon",
>> +       .id = UCLASS_SYSCON,
>> +       .of_match = rk3066_syscon_ids,
>> +};
>> +
>> +#if CONFIG_IS_ENABLED(OF_PLATDATA)
>> +static int rk3066_syscon_bind_of_platdata(struct udevice *dev)
>> +{
>> +       dev->driver_data = dev->driver->of_match->data;
>> +       debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
>> +
>> +       return 0;
>> +}
>> +
>> +U_BOOT_DRIVER(rockchip_rk3188_noc) = {
>> +       .name = "rockchip_rk3188_noc",
>> +       .id = UCLASS_SYSCON,
>> +       .of_match = rk3066_syscon_ids,
>> +       .bind = rk3066_syscon_bind_of_platdata,
>> +};
>> +
>> +U_BOOT_DRIVER(rockchip_rk3066_grf) = {
>> +       .name = "rockchip_rk3066_grf",
>> +       .id = UCLASS_SYSCON,
>> +       .of_match = rk3066_syscon_ids + 1,
>> +       .bind = rk3066_syscon_bind_of_platdata,
>> +};
>> +
>> +U_BOOT_DRIVER(rockchip_rk3066_pmu) = {
>> +       .name = "rockchip_rk3066_pmu",
>> +       .id = UCLASS_SYSCON,
>> +       .of_match = rk3066_syscon_ids + 2,
>> +       .bind = rk3066_syscon_bind_of_platdata,
>> +};
>> +#endif
>> diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
>> new file mode 100644
>> index 0000000..7009616
>> --- /dev/null
>> +++ b/include/configs/rk3066_common.h
>> @@ -0,0 +1,125 @@
>> +/*
>> + * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691 at gmail.com>
>> + *
>> + * SPDX-License-Identifier:     GPL-2.0+
>> + */
>> +
>> +#ifndef __CONFIG_RK3066_COMMON_H
>> +#define __CONFIG_RK3066_COMMON_H
>> +
>> +#include <asm/arch/hardware.h>
>> +#include "rockchip-common.h"
>> +
>> +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
>> +#define CONFIG_ENV_IS_NOWHERE
>> +#define CONFIG_ENV_SIZE                        0x2000
>> +#define CONFIG_SYS_MAXARGS             16
>> +#define CONFIG_BAUDRATE                        115200
>> +#define CONFIG_SYS_MALLOC_LEN          (64 << 20)
>> +#define CONFIG_SYS_CBSIZE              256
>> +
>> +#define CONFIG_SYS_TIMER_RATE          24000000
>> +#define CONFIG_SYS_TIMER_BASE          0x20038000
>> +#define CONFIG_SYS_TIMER_COUNTER       (CONFIG_SYS_TIMER_BASE + 4)
>> +#define CONFIG_SYS_TIMER_COUNTS_DOWN
>> +
>> +#define CONFIG_SPL_BOARD_INIT
>> +
>> +#define CONFIG_SYS_TEXT_BASE           0x60408000
>> +
>> +#define CONFIG_SYS_INIT_SP_ADDR                0x78000000
>> +#define CONFIG_SYS_LOAD_ADDR           0x70800800
>> +
>> +#ifdef CONFIG_TPL_BUILD
>> +#define CONFIG_SPL_TEXT_BASE           0x10080C04
>> +#define CONFIG_SPL_STACK               0x1008FFFF
>> +/* tpl size max 32kb - 4byte RK30 header */
>> +#define CONFIG_SPL_MAX_SIZE            (0x8000 - 0x4)
>> +#elif defined(CONFIG_SPL_BUILD)
>> +/* spl size max 200k */
>> +#define CONFIG_SPL_MAX_SIZE            0x32000
>> +#define CONFIG_SPL_TEXT_BASE           0x60000000
>> +#define CONFIG_SPL_STACK               0x1008FFFF
>> +#define CONFIG_SPL_STACK_R_ADDR                0x70000000
>> +#define CONFIG_SPL_STACK_R             1
>> +#define CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN 0x200000
>> +#define CONFIG_SPL_OF_CONTROL          1
>> +#define CONFIG_SPL_OF_PLATDATA         1
>> +#define CONFIG_SPL_FRAMEWORK           1
>> +#define CONFIG_SPL_CLK                 1
>> +#define CONFIG_SPL_PINCTRL             1
>> +#define CONFIG_SPL_REGMAP              1
> Many of these should be set in Kconfig or the defconfig file.
>
Yes but some have gave me tpl build issues that's why i did that here
>> +#define CONFIG_SPL_SYSCON              1
>> +#define CONFIG_SPL_RAM                 1
>> +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT        1
>> +#define CONFIG_SPL_MMC_SUPPORT         1
>> +#define CONFIG_ROCKCHIP_SERIAL         1
>> +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "u-boot-dtb.bin"
>> +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
>> +#define CONFIG_SPL_LIBDISK_SUPPORT     1
>> +#define CONFIG_SPL_EXT_SUPPORT         1
>> +#define CONFIG_SPL_FAT_SUPPORT         1
>> +#define CONFIG_SPL_DM                  1
>> +#define CONFIG_SPL_GPIO_SUPPORT                1
>> +#define CONFIG_SPL_POWER_SUPPORT       1
>> +#endif
>> +
>> +#define CONFIG_SYS_NS16550_MEM32
>> +
>> +#define CONFIG_ROCKCHIP_MAX_INIT_SIZE  (0x10000 - 0xC00)
>> +#define CONFIG_ROCKCHIP_CHIP_TAG       "RK30"
>> +
>> +/* MMC/SD IP block */
>> +#define CONFIG_BOUNCE_BUFFER
>> +
>> +#define CONFIG_CMD_CACHE
>> +
>> +#define CONFIG_SYS_SDRAM_BASE          0x60000000
>> +#define CONFIG_NR_DRAM_BANKS           1
>> +#define SDRAM_BANK_SIZE                        (1024UL << 20UL)
>> +
>> +#ifndef CONFIG_SPL_BUILD
>> +/* usb */
>> +#define CONFIG_USB
>> +#define CONFIG_DM_USB
>> +#define CONFIG_USB_STORAGE
>> +#define CONFIG_CMD_USB
>> +#define CONFIG_USB_DWC2
>> +
>> +#define CONFIG_USB_GADGET
>> +#define CONFIG_USB_GADGET_DUALSPEED
>> +#define CONFIG_USB_GADGET_DWC2_OTG
>> +#define CONFIG_ROCKCHIP_USB2_PHY
>> +#define CONFIG_USB_GADGET_VBUS_DRAW    0
>> +
>> +#define CONFIG_USB_FUNCTION_MASS_STORAGE
>> +#define CONFIG_CMD_USB_MASS_STORAGE
>> +
>> +#define CONFIG_USB_GADGET_DOWNLOAD
>> +#define CONFIG_G_DNL_MANUFACTURER      "Rockchip"
>> +#define CONFIG_G_DNL_VENDOR_NUM                0x2207
>> +#define CONFIG_G_DNL_PRODUCT_NUM       0x300a
>> +
>> +#define ENV_MEM_LAYOUT_SETTINGS \
>> +       "scriptaddr=0x60000000\0" \
>> +       "pxefile_addr_r=0x60100000\0" \
>> +       "fdt_addr_r=0x61f00000\0" \
>> +       "kernel_addr_r=0x62000000\0" \
>> +       "ramdisk_addr_r=0x64000000\0"
>> +
>> +#include <config_distro_bootcmd.h>
>> +
>> +#define CONFIG_EXTRA_ENV_SETTINGS \
>> +       "fdt_high=0x6fffffff\0" \
>> +       "initrd_high=0x6fffffff\0" \
>> +       "partitions=" PARTS_DEFAULT \
>> +       ENV_MEM_LAYOUT_SETTINGS \
>> +       ROCKCHIP_DEVICE_SETTINGS \
>> +       BOOTENV
>> +
>> +#include <config_distro_defaults.h>
>> +#endif
>> +
>> +#define CONFIG_PREBOOT
>> +
>> +#endif
>> --
>> 2.7.4
>>
> Regards,
> Simon
Regards,
Paweł


More information about the U-Boot mailing list