[U-Boot] [PATCH v2 00/12] Big work on sunxi DW DRAM controllers and some new DDR type support

Jagan Teki jagannadh.teki at gmail.com
Thu Jun 8 17:10:20 UTC 2017


On Sat, Jun 3, 2017 at 2:40 PM, Icenowy Zheng <icenowy at aosc.io> wrote:
> This patchset contains several works on the sunxi DesignWare DRAM
> controllers.
>
> The 1st patch made an option for H3-like DRAM controllers
> (DesignWare ones), which can ease further import of alike controllers.
>
> The 2nd and 3rd patches are for supporting 16-bit DW DRAM controllers,
> in order to add V3s DRAM support (The controller on V3s is 16-bit).
>
> The 4th patch adds bank detection code, in order to support some DDR2
> chips.
>
> The 5th patch adds a framework for select DRAM type and timing -- it's
> needed for boards that use DRAM chips rather than DDR3.
>
> The 6th patch enables dual rank detection in the DW DRAM code on SoCs
> except R40. For R40 the dual rank facility is still not so clear, so it's
> temporarily disabled.
>
> The 7th~9th patches enables support for DRAM initialization and SPL for
> the V3s SoC, which integrates a DDR2 chip.
>
> The 10th and 11th patches adds support for LPDDR3, with the stock boot0
> timing. (Seen in A83T boot0 source and some leaked H5/R40 libdram source)
>
> The 12th patches adds a defconfig for SoPine w/ official baseboard, which
> utilizes LPDDR3.
>
> Icenowy Zheng (12):
>   sunxi: makes an invisible option for H3-like DRAM controllers
>   sunxi: Rename bus-width related macros in H3 DRAM code
>   sunxi: add option for 16-bit DW DRAM controller
>   sunxi: add bank detection code to H3 DRAM initialization code
>   sunxi: Add selective DRAM type and timing
>   sunxi: enable dual rank detection in DesignWare-like DRAM code

Reviewed-by: Jagan Teki <jagan at amarulasolutions.com>

>   sunxi: add support for the DDR2 in V3s SoC

Acked-by: Jagan Teki <jagan at amarulasolutions.com>

>   sunxi: add support for V3s DRAM controller
>   sunxi: enable DRAM initialization and SPL for V3s SoC
>   sunxi: add LPDDR3 DRAM type support for DesignWare-like DRAM
>     controller

Reviewed-by: Jagan Teki <jagan at amarulasolutions.com>

>   sunxi: add LPDDR3 timing from stock boot0

Acked-by: Jagan Teki <jagan at amarulasolutions.com>

>   sunxi: add a defconfig for SoPine w/ official baseboard

Reviewed-by: Jagan Teki <jagan at amarulasolutions.com>

Tested MMC boot in SoPine.

Tested-by: Jagan Teki <jagan at amarulasolutions.com>

Applied to u-boot-sunxi/master

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.


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