[U-Boot] [PATCH] rockchip: rk3288: Add reset reason detection

[Kever Yang]

Hi Wadim,


On 06/13/2017 07:20 PM, Wadim Egorov wrote:
> Sometimes it's helpful to know the reset reason caused in the SoC.
> Add reset reason detection for the RK3288 SoC.
> This will set an environemt variable which represents the reset reason.
>
> Signed-off-by: Wadim Egorov <w.egorov at phytec.de>
> ---
>   arch/arm/mach-rockchip/rk3288-board.c | 28 ++++++++++++++++++++++++++++
>   1 file changed, 28 insertions(+)
>
> diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
> index a354d99..8cdc7dc 100644
> --- a/arch/arm/mach-rockchip/rk3288-board.c
> +++ b/arch/arm/mach-rockchip/rk3288-board.c
> @@ -11,6 +11,7 @@
>   #include <syscon.h>
>   #include <asm/io.h>
>   #include <asm/arch/clock.h>
> +#include <asm/arch/cru_rk3288.h>
>   #include <asm/arch/periph.h>
>   #include <asm/arch/pmu_rk3288.h>
>   #include <asm/arch/qos_rk3288.h>
> @@ -70,10 +71,37 @@ int rk3288_qos_init(void)
>   	return 0;
>   }
>   
> +static void rk3288_detect_reset_reason(void)
> +{
> +	struct rk3288_cru *cru = rockchip_get_cru();
> +	if (IS_ERR(cru))
> +		return;
> +
> +	switch (cru->cru_glb_rst_st) {
> +	case (1 << 0):
> +		setenv("reset_reason", "POR");

 From RK3288 TRM, the bit 0 set to 1 means "last hot reset is first 
global rst",
I think this means a software reset somewhere with write to register 
CRU_GLB_SRST_FST_VALUE.

Do you test with power on and this bit will be set?

Thanks,
- Kever
> +		break;
> +	case (1 << 1):
> +		setenv("reset_reason", "RST");
> +		break;
> +	case (1 << 2):
> +	case (1 << 3):
> +		setenv("reset_reason", "THERMAL");
> +		break;
> +	case (1 << 4):
> +	case (1 << 5):
> +		setenv("reset_reason", "WDOG");
> +		break;
> +	default:
> +		setenv("reset_reason", "unknown reset");
> +	}
> +}
> +
>   int board_late_init(void)
>   {
>   	setup_boot_mode();
>   	rk3288_qos_init();
> +	rk3288_detect_reset_reason();
>   
>   	return rk_board_late_init();
>   }