[U-Boot] [PATCH v5 08/11] usb: dwc2: force to host mode if not support HNP/SRP

Simon Glass sjg at chromium.org
Sat Jun 17 03:40:33 UTC 2017


Hi Meng,

On 12 June 2017 at 03:19, Meng Dongyang <daniel.meng at rock-chips.com> wrote:
> In current code, after running the command of "usb start", the controller
> will keep in otg mode and can't switch to host mode if not support
> SNP/SRP capability. So add the property of "hnp-srp-disable" in the DTS
> to config the contrller work in force mode of host.
>
> Signed-off-by: Meng Dongyang <daniel.meng at rock-chips.com>
> ---
>
> Changes in v5: None
> Changes in v4:
> - Prepare a mask and set capabilities in GUSBCFG register once
>
> Changes in v3:
> - revert change of macro definition in dwc2 driver
> - support host mode without HNP/SRP capability through DTS
>
> Changes in v2:
> - Splited from patch [07/08] of v1
>
>  drivers/usb/host/dwc2.c | 19 ++++++++++++++++---
>  1 file changed, 16 insertions(+), 3 deletions(-)

Reviewed-by: Simon Glass <sjg at chromium.org>

Please see below.

>
> diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
> index 0e5df15..e25f885 100644
> --- a/drivers/usb/host/dwc2.c
> +++ b/drivers/usb/host/dwc2.c
> @@ -43,6 +43,7 @@ struct dwc2_priv {
>         struct dwc2_core_regs *regs;
>         int root_hub_devnum;
>         bool ext_vbus;
> +       bool hnp_srp_disable;

Please add a comment for this that fully describes its effect.

>         bool oc_disable;
>  };
>
> @@ -394,6 +395,9 @@ static void dwc_otg_core_init(struct dwc2_priv *priv)
>                 usbcfg |= DWC2_GUSBCFG_ULPI_CLK_SUS_M;
>         }
>  #endif
> +       if (priv->hnp_srp_disable)
> +               usbcfg |= DWC2_GUSBCFG_FORCEHOSTMODE;
> +
>         writel(usbcfg, &regs->gusbcfg);
>
>         /* Program the GAHBCFG Register. */
> @@ -422,12 +426,16 @@ static void dwc_otg_core_init(struct dwc2_priv *priv)
>
>         writel(ahbcfg, &regs->gahbcfg);
>
> -       /* Program the GUSBCFG register for HNP/SRP. */
> -       setbits_le32(&regs->gusbcfg, DWC2_GUSBCFG_HNPCAP | DWC2_GUSBCFG_SRPCAP);
> +       /* Program the capabilities in GUSBCFG Register */
> +       usbcfg = 0;
>
> +       if (!priv->hnp_srp_disable)
> +               usbcfg |= DWC2_GUSBCFG_HNPCAP | DWC2_GUSBCFG_SRPCAP;
>  #ifdef CONFIG_DWC2_IC_USB_CAP
> -       setbits_le32(&regs->gusbcfg, DWC2_GUSBCFG_IC_USB_CAP);
> +       usbcfg |= DWC2_GUSBCFG_IC_USB_CAP;
>  #endif
> +
> +       setbits_le32(&regs->gusbcfg, usbcfg);
>  }
>
>  /*
> @@ -1244,6 +1252,11 @@ static int dwc2_usb_ofdata_to_platdata(struct udevice *dev)
>         if (prop)
>                 priv->oc_disable = true;
>
> +       prop = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
> +                          "hnp-srp-disable", NULL);

Can you use dev_read_boot() (preferred) or fdtdec_get_bool()?

> +       if (prop)
> +               priv->hnp_srp_disable = true;
> +
>         return 0;
>  }
>
> --
> 1.9.1
>
>

Regards,
Simon


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