[U-Boot] [PATCH v8 4/7] arm: socfpga: Enable FPGA driver on SPL
Chee, Tien Fong
tien.fong.chee at intel.com
Mon Jun 19 10:32:02 UTC 2017
On Sel, 2017-06-13 at 11:05 +0200, Marek Vasut wrote:
> On 06/13/2017 05:26 AM, Chee, Tien Fong wrote:
> >
> > On Isn, 2017-06-12 at 16:38 +0800, Chee, Tien Fong wrote:
> > >
> > > On Jum, 2017-06-09 at 08:52 -0500, Dinh Nguyen wrote:
> > > >
> > > >
> > > >
> > > > On 06/09/2017 03:25 AM, Marek Vasut wrote:
> > > > >
> > > > >
> > > > >
> > > > >
> > > > > I didn't really look since we still have a discussion open on
> > > > > V8
> > > > > .
> > > > > There
> > > > > is no point in sending new versions while discussion is still
> > > > > open.
> > > > > Also, I'd like some review from Ley/Dinh
> > > > I've reviewed v6 and gave my Reviewed-by. Now I see there's a
> > > > v10.
> > > > Should I be reviewing v10 or wait for a new version?
> > > >
> > > > Dinh
> > > If Marek agree with my planning, code cleaning for gen5 in
> > > different
> > > patchset. v10 is updated based on Mareks' comments on v9, then
> > > v10
> > > should be the final version.
> > >
> > > Thanks.
> > Hi Marek,
> >
> > I think Dinh is still waiting answer from you.
> Thanks for reminding me daily. I'm actually on vacation, so sorry for
> the delayed reply.
>
> >
> > Could you please to
> > advice?
> Actually I lost track of what's going on here, we're still having
> discussion on V8 and I already have V10 in my mailbox. I have two
> suggestions:
> 1) Slow down, bombarding people with new versions of patches every
> day
> does not help at all. Give people some space to review the
> patchset,
> discuss and let the discussion settle, then submit a new set. That
> can take a week or more, so let's establish a rule that you will
> not
> submit more than one version of the patchset each week unless
> explicitly asked. OK ?
> 2) I'd like AB/RB from Dinh on this set, yes.
>
Hi Dinh,
Could you help to review?
Thanks.
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