[U-Boot] [PATCH v3] regmap: add support for address cell 2

Simon Glass sjg at chromium.org
Tue Jun 20 18:26:16 UTC 2017


Hi Kever,

On 18 June 2017 at 22:11, Simon Glass <sjg at chromium.org> wrote:
>
> Hi Kever,
>
> On 7 May 2017 at 19:45, Kever Yang <kever.yang at rock-chips.com> wrote:
> > Hi Heiko,
> >
> >
> > Thanks for your comments.
> >
> >
> > On 05/05/2017 09:10 PM, Heiko Stuebner wrote:
> >>
> >> Hi Kever,
> >>
> >> Am Freitag, 5. Mai 2017, 10:39:35 CEST schrieb Kever Yang:
> >>>
> >>> ARM64 is using 64bit address which address cell is 2 instead of 1,
> >>> update to support it when of-platdata enabled.
> >>>
> >>> Signed-off-by: Kever Yang <kever.yang at rock-chips.com>
> >>
> >> This helps make OF_PLATDATA work on my firefly-rk3399 so yay :-),
> >> but I don't think it's that easy to solve, see below:
> >>
> >>> ---
> >>>
> >>> Changes in v3:
> >>> - move of_plat_get_number() into lib/of_plat.c
> >>>
> >>> Changes in v2:
> >>> - rename the fdtdec_get_number() to of_plat_get_number()
> >>>
> >>>   drivers/core/regmap.c |  9 +++++++++
> >>>   include/of_plat.h     | 22 ++++++++++++++++++++++
> >>>   lib/Makefile          |  3 +++
> >>>   lib/of_plat.c         | 17 +++++++++++++++++
> >>>   4 files changed, 51 insertions(+)
> >>>   create mode 100644 include/of_plat.h
> >>>   create mode 100644 lib/of_plat.c
> >>>
> >>> diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
> >>> index 3bec3df..c03279e 100644
> >>> --- a/drivers/core/regmap.c
> >>> +++ b/drivers/core/regmap.c
> >>> @@ -12,6 +12,7 @@
> >>>   #include <malloc.h>
> >>>   #include <mapmem.h>
> >>>   #include <regmap.h>
> >>> +#include <of_plat.h>
> >>>     #include <asm/io.h>
> >>>   @@ -49,11 +50,19 @@ int regmap_init_mem_platdata(struct udevice *dev,
> >>> u32 *reg, int count,
> >>>         if (!map)
> >>>                 return -ENOMEM;
> >>>   +#ifdef CONFIG_PHYS_64BIT
> >>> +       map->base = of_plat_get_number(reg, 2);
> >>> +       for (range = map->range; count > 0; reg += 4, range++, count--) {
> >>> +               range->start = of_plat_get_number(reg, 2);
> >>> +               range->size = of_plat_get_number(reg + 2, 2);
> >>> +       }
> >>
> >> I may just be missing something, but how can you be sure that the
> >> cell-size
> >> is always 2?
> >>
> >> For example, there were discussions about 64bit platforms not really
> >> needing to add all the 0x0 elements, when the whole io-registers are well
> >> below the 4GB mark and for example at least one sunxi also uses this, see
> >> for example:
> >> allwinner/sun50i-a64.dtsi, altera/socfpga_stratix10.dtsi,
> >> broadcom/bcm283x.dtsi and problably more using #address-cells = <1>,
> >> #size-cells = <1> for their memory mapped io.
> >>
> >> And from what I've seen dtoc simply converts the reg property and just
> >> ignores #address-cells and #size-cells (or I'm overlooking something).
> >>
> >> Possible solutions that come to mind would be make dtoc also convert
> >> #address-cells and #size-cells, making regmap and everybody check it
> >> or alternatively make dtoc convert regs to cell-size 2 in all cases when
> >> CONFIG_PHYS_64BIT is set.
> >
> >
> > @Simon, could you take a look about this issue, I really not good at dtoc
> > and libfdt, I think maybe we can re-use fdtdec_get_number() if dtoc do not
> > do the fdt32_to_cpu()  int dtoc?
>
> I think the best solution is the second one above. However dtoc is a
> bit of a pain to change at the moment. I've sent a series to clean it
> up.
>
> I'll hopefully take a look at the above in the next few weeks.

Just to follow up, I sent a few patches for this yesterday.

Regards,
Simon


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