[U-Boot] [PATCH v2 18/18] x86: minnowmax: Enable USB xHCI support

[Bin Meng]

BayTrail SoC supports both EHCI and xHCI controllers. However only
one host controller (either EHCI or xHCI) can be used. To enable
HSIC and SS ports, xHCI must be used. This turns on xHCI support on
Intel MinnowMax board.

Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
Reviewed-by: Simon Glass <sjg at chromium.org>
Reviewed-by: Stefan Roese <sr at denx.de>
Tested-by: Stefan Roese <sr at denx.de>

---

Changes in v2:
- Drop two x86 patches that were already applied to u-boot-x86

 arch/x86/dts/minnowmax.dts  | 3 +++
 configs/minnowmax_defconfig | 1 +
 2 files changed, 4 insertions(+)

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 4c0a8fe..a0ad03c 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -272,6 +272,9 @@
 		fsp,enable-spi;
 		fsp,enable-sata;
 		fsp,sata-mode = <SATA_MODE_AHCI>;
+#ifdef CONFIG_USB_XHCI_HCD
+		fsp,enable-xhci;
+#endif
 		fsp,lpe-mode = <LPE_MODE_PCI>;
 		fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
 		fsp,enable-dma0;
diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index 96a45aa..43e53a1 100644
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -68,6 +68,7 @@ CONFIG_ICH_SPI=y
 CONFIG_TIMER=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_DM_VIDEO=y
-- 
2.9.2