[U-Boot] [PATCH 1/4] arm: socfpga: Removing unused passing parameter of socfpga_bridges_reset

[Chee, Tien Fong]

On Ahd, 2017-03-05 at 01:57 +0100, Marek Vasut wrote:
> On 03/03/2017 01:50 PM, Chee Tien Fong wrote:
> > 
> > From: Tien Fong Chee <tien.fong.chee at intel.com>
> > 
> > This patch removes the unused passing parameter of
> > socfpga_bridges_reset
> > function in Arria10.
> > 
> > Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
> > Cc: Marek Vasut <marex at denx.de>
> > Cc: Dinh Nguyen <dinguyen at kernel.org>
> > Cc: Ching Liang See <chin.liang.see at intel.com>
> > Cc: Ley Foon <ley.foon.tan at intel.com>
> > Cc: Westergreen Dalon <dalon.westergreen at intel.com>
> We do NOT have arria10 support in mainline, I am confused.
> Can you please sync with Ley when submitting patches ?
> 
> Thanks
> 
This series is working on top of [1] initial patchset which enables 
the basic support for Arria 10 and other features.
https://www.mail-archive.com/u-boot@lists.denx.de/msg240053.html

I just realized i forgot to +CC you guys in the cover letter,
https://www.mail-archive.com/u-boot@lists.denx.de/msg240829.html.
I am sorry to have you confused.
> > 
> > ---
> >  arch/arm/mach-socfpga/include/mach/reset_manager.h |    3 ---
> >  .../include/mach/reset_manager_arria10.h           |    1 +
> >  .../mach-socfpga/include/mach/reset_manager_gen5.h |    1 +
> >  arch/arm/mach-socfpga/reset_manager_arria10.c      |    2 +-
> >  4 files changed, 3 insertions(+), 4 deletions(-)
> >  mode change 100755 => 100644 arch/arm/mach-
> > socfpga/include/mach/reset_manager_arria10.h
> >  mode change 100755 => 100644 arch/arm/mach-
> > socfpga/include/mach/reset_manager_gen5.h
> > 
> > diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h
> > b/arch/arm/mach-socfpga/include/mach/reset_manager.h
> > index 64526b6..f5189e8 100644
> > --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
> > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
> > @@ -8,9 +8,6 @@
> >  #define	_RESET_MANAGER_H_
> > 
> >  void reset_cpu(ulong addr);
> > -
> > -void socfpga_bridges_reset(int enable);
> > -
> >  void socfpga_per_reset(u32 reset, int set);
> >  void socfpga_per_reset_all(void);
> > 
> > diff --git a/arch/arm/mach-
> > socfpga/include/mach/reset_manager_arria10.h b/arch/arm/mach-
> > socfpga/include/mach/reset_manager_arria10.h
> > old mode 100755
> > new mode 100644
> > index 2668a86..954381c
> > --- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
> > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
> > @@ -16,6 +16,7 @@ void
> > reset_assert_fpga_connected_peripherals(void);
> >  void reset_deassert_osc1wd0(void);
> >  void reset_assert_uart(void);
> >  void reset_deassert_uart(void);
> > +void socfpga_bridges_reset(void);
> > 
> >  struct socfpga_reset_manager {
> >  	u32	stat;
> > diff --git a/arch/arm/mach-
> > socfpga/include/mach/reset_manager_gen5.h b/arch/arm/mach-
> > socfpga/include/mach/reset_manager_gen5.h
> > old mode 100755
> > new mode 100644
> > index 028974a..da17f4c
> > --- a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
> > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
> > @@ -8,6 +8,7 @@
> >  #define	_RESET_MANAGER_GEN5_H_
> > 
> >  void reset_deassert_peripherals_handoff(void);
> > +void socfpga_bridges_reset(int enable);
> > 
> >  struct socfpga_reset_manager {
> >  	u32	status;
> > diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c
> > b/arch/arm/mach-socfpga/reset_manager_arria10.c
> > index 01156de..684c6be 100644
> > --- a/arch/arm/mach-socfpga/reset_manager_arria10.c
> > +++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
> > @@ -355,7 +355,7 @@ void socfpga_bridges_reset(int enable)
> >  	/* For SoCFPGA-VT, this is NOP. */
> >  }
> >  #else
> > -void socfpga_bridges_reset(int enable)
> > +void socfpga_bridges_reset(void)
> >  {
> >  /* Disable all the bridges (hps2fpga, lwhps2fpga, fpga2hps,
> > fpga2sdram) */
> >  	/* set idle request to all bridges */
> >