[U-Boot] [PATCH] arm: lpc32xx: Add i2c DM support

[Sylvain Lemieux]

From: Liam Beguin <lbeguin at tycoint.com>

Since the driver does not yet support devicetree bindings,
the i2c buses need to be defined and probed when the bus
is initialized.

Signed-off-by: Liam Beguin <lbeguin at tycoint.com>
Signed-off-by: Sylvain Lemieux <slemieux at tycoint.com>
---
Note:
* In the init functions, we can only display a warning
  and not return an error because the board would reset.

* This patch is require as part of the DM support of the LPC32xx I2C driver.
  All I2C drivers should be converted, to DM, by the end of June 2017.

* This patch depend on the following patchset & patch:
  https://lists.denx.de/pipermail/u-boot/2017-March/283672.html (I2C)
  https://lists.denx.de/pipermail/u-boot/2017-March/283680.html (USB)

 arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 55 ++++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index f744398ca7..740ed774ba 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -12,12 +12,38 @@
 #include <asm/arch/clk.h>
 #include <asm/arch/uart.h>
 #include <asm/arch/mux.h>
+#include <asm/arch/i2c.h>
 #include <asm/io.h>
 
 static struct clk_pm_regs    *clk  = (struct clk_pm_regs *)CLK_PM_BASE;
 static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
 static struct mux_regs *mux = (struct mux_regs *)MUX_BASE;
 
+#ifdef CONFIG_DM_I2C
+static const struct lpc32xx_i2c_dev lpc32xx_i2cs[] = {
+	{
+		.base     = (struct lpc32xx_i2c_base *)I2C1_BASE,
+		.speed    = CONFIG_SYS_I2C_LPC32XX_SPEED,
+		.index    = I2C_0,
+	},
+	{
+		.base     = (struct lpc32xx_i2c_base *)I2C2_BASE,
+		.speed    = CONFIG_SYS_I2C_LPC32XX_SPEED,
+		.index    = I2C_1,
+	},
+	{
+		.base     = (struct lpc32xx_i2c_base *)(USB_BASE + 0x300),
+		.speed    = 100000,
+		.index    = I2C_2,
+	},
+};
+U_BOOT_DEVICES(lpc32xx_i2cs) = {
+	{ "i2c_lpc32xx", &lpc32xx_i2cs[0] },
+	{ "i2c_lpc32xx", &lpc32xx_i2cs[1] },
+	{ "i2c_lpc32xx", &lpc32xx_i2cs[2] },
+};
+#endif /* CONFIG_DM_I2C */
+
 void lpc32xx_uart_init(unsigned int uart_id)
 {
 	if (uart_id < 1 || uart_id > 7)
@@ -110,19 +136,48 @@ void lpc32xx_slc_nand_init(void)
 
 void lpc32xx_usb_init(void)
 {
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+	int ret;
+#endif /* CONFIG_DM_I2C */
+
 	/* Do not route the UART 5 Tx/Rx pins to the USB D+ and USB D- pins. */
 	clrbits_le32(&ctrl->ctrl, UART_CTRL_UART5_USB_MODE);
+
+#ifdef CONFIG_DM_I2C
+	ret = uclass_get_device(UCLASS_I2C, I2C_2, &dev);
+	if (ret)
+		debug("I2C_2 init failed: %d\n", ret);
+#endif /* CONFIG_DM_I2C */
 }
 
 void lpc32xx_i2c_init(unsigned int devnum)
 {
 	/* Enable I2C interface */
 	uint32_t ctrl = readl(&clk->i2cclk_ctrl);
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+	int ret;
+#endif /* CONFIG_DM_I2C */
+
 	if (devnum == 1)
 		ctrl |= CLK_I2C1_ENABLE;
 	if (devnum == 2)
 		ctrl |= CLK_I2C2_ENABLE;
 	writel(ctrl, &clk->i2cclk_ctrl);
+
+#ifdef CONFIG_DM_I2C
+	if (devnum == 1) {
+		ret = uclass_get_device(UCLASS_I2C, I2C_0, &dev);
+		if (ret)
+			debug("I2C_1 init failed: %d\n", ret);
+	}
+	if (devnum == 2) {
+		ret = uclass_get_device(UCLASS_I2C, I2C_1, &dev);
+		if (ret)
+			debug("I2C_2 init failed: %d\n", ret);
+	}
+#endif /* CONFIG_DM_I2C */
 }
 
 U_BOOT_DEVICE(lpc32xx_gpios) = {
-- 
2.11.0