[U-Boot] [PATCH v1 19/41] net: mvpp2: adjust mvpp2_{rxq, txq}_init for PPv2.2

[Joe Hershberger]

On Tue, Mar 21, 2017 at 9:27 AM, Stefan Roese <sr at denx.de> wrote:
> From: Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
>
> In PPv2.2, the MVPP2_RXQ_DESC_ADDR_REG and MVPP2_TXQ_DESC_ADDR_REG
> registers have a slightly different layout, because they need to contain
> a 64-bit address for the RX and TX descriptor arrays. This commit
> adjusts those functions accordingly.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
> Signed-off-by: Stefan Roese <sr at denx.de>

Acked-by: Joe Hershberger <joe.hershberger at ni.com>

>
>  drivers/net/mvpp2.c | 26 +++++++++++++++++++++-----
>  1 file changed, 21 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
> index ca663ce822..c297097c3a 100644
> --- a/drivers/net/mvpp2.c
> +++ b/drivers/net/mvpp2.c
> @@ -143,6 +143,7 @@ do {                                                                        \
>  /* Descriptor Manager Top Registers */
>  #define MVPP2_RXQ_NUM_REG                      0x2040
>  #define MVPP2_RXQ_DESC_ADDR_REG                        0x2044
> +#define     MVPP22_DESC_ADDR_OFFS              8
>  #define MVPP2_RXQ_DESC_SIZE_REG                        0x2048
>  #define     MVPP2_RXQ_DESC_SIZE_MASK           0x3ff0
>  #define MVPP2_RXQ_STATUS_UPDATE_REG(rxq)       (0x3000 + 4 * (rxq))
> @@ -184,6 +185,7 @@ do {                                                                        \
>  #define MVPP2_TXQ_RSVD_CLR_REG                 0x20b8
>  #define     MVPP2_TXQ_RSVD_CLR_OFFSET          16
>  #define MVPP2_AGGR_TXQ_DESC_ADDR_REG(cpu)      (0x2100 + 4 * (cpu))
> +#define     MVPP22_AGGR_TXQ_DESC_ADDR_OFFS     8
>  #define MVPP2_AGGR_TXQ_DESC_SIZE_REG(cpu)      (0x2140 + 4 * (cpu))
>  #define     MVPP2_AGGR_TXQ_DESC_SIZE_MASK      0x3ff0
>  #define MVPP2_AGGR_TXQ_STATUS_REG(cpu)         (0x2180 + 4 * (cpu))
> @@ -3108,6 +3110,8 @@ static int mvpp2_aggr_txq_init(struct udevice *dev,
>                                int desc_num, int cpu,
>                                struct mvpp2 *priv)
>  {
> +       u32 txq_dma;
> +
>         /* Allocate memory for TX descriptors */
>         aggr_txq->descs = buffer_loc.aggr_tx_descs;
>         aggr_txq->descs_dma = (dma_addr_t)buffer_loc.aggr_tx_descs;
> @@ -3124,10 +3128,16 @@ static int mvpp2_aggr_txq_init(struct udevice *dev,
>         aggr_txq->next_desc_to_proc = mvpp2_read(priv,
>                                                  MVPP2_AGGR_TXQ_INDEX_REG(cpu));
>
> -       /* Set Tx descriptors queue starting address */
> -       /* indirect access */
> -       mvpp2_write(priv, MVPP2_AGGR_TXQ_DESC_ADDR_REG(cpu),
> -                   aggr_txq->descs_dma);
> +       /* Set Tx descriptors queue starting address indirect
> +        * access
> +        */

Single line comment?

> +       if (priv->hw_version == MVPP21)
> +               txq_dma = aggr_txq->descs_dma;
> +       else
> +               txq_dma = aggr_txq->descs_dma >>
> +                       MVPP22_AGGR_TXQ_DESC_ADDR_OFFS;
> +
> +       mvpp2_write(priv, MVPP2_AGGR_TXQ_DESC_ADDR_REG(cpu), txq_dma);
>         mvpp2_write(priv, MVPP2_AGGR_TXQ_DESC_SIZE_REG(cpu), desc_num);
>
>         return 0;
> @@ -3138,6 +3148,8 @@ static int mvpp2_rxq_init(struct mvpp2_port *port,
>                           struct mvpp2_rx_queue *rxq)
>
>  {
> +       u32 rxq_dma;
> +
>         rxq->size = port->rx_ring_size;
>
>         /* Allocate memory for RX descriptors */
> @@ -3156,7 +3168,11 @@ static int mvpp2_rxq_init(struct mvpp2_port *port,
>
>         /* Set Rx descriptors queue starting address - indirect access */
>         mvpp2_write(port->priv, MVPP2_RXQ_NUM_REG, rxq->id);
> -       mvpp2_write(port->priv, MVPP2_RXQ_DESC_ADDR_REG, rxq->descs_dma);
> +       if (port->priv->hw_version == MVPP21)
> +               rxq_dma = rxq->descs_dma;
> +       else
> +               rxq_dma = rxq->descs_dma >> MVPP22_DESC_ADDR_OFFS;
> +       mvpp2_write(port->priv, MVPP2_RXQ_DESC_ADDR_REG, rxq_dma);
>         mvpp2_write(port->priv, MVPP2_RXQ_DESC_SIZE_REG, rxq->size);
>         mvpp2_write(port->priv, MVPP2_RXQ_INDEX_REG, 0);
>
> --
> 2.12.0
>
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