[U-Boot] [PATCH v2 12/20] arm: socfpga: Add pinmux for Arria 10
Ley Foon Tan
lftan.linux at gmail.com
Wed Mar 22 06:26:10 UTC 2017
On Fri, Mar 10, 2017 at 9:50 AM, Marek Vasut <marex at denx.de> wrote:
> On 03/09/2017 01:26 AM, Ley Foon Tan wrote:
>> Add pinmux support for Arria 10.
>>
>> Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
>> Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>
>> ---
>> arch/arm/mach-socfpga/Makefile | 1 +
>> arch/arm/mach-socfpga/include/mach/pinmux.h | 15 +++++
>> arch/arm/mach-socfpga/pinmux_arria10.c | 96 +++++++++++++++++++++++++++++
>> 3 files changed, 112 insertions(+)
>> create mode 100644 arch/arm/mach-socfpga/include/mach/pinmux.h
>> create mode 100644 arch/arm/mach-socfpga/pinmux_arria10.c
>>
>> diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
>> index 9c4617f..68d55e4 100644
>> --- a/arch/arm/mach-socfpga/Makefile
>> +++ b/arch/arm/mach-socfpga/Makefile
>> @@ -12,6 +12,7 @@ obj-y += misc.o timer.o reset_manager.o clock_manager.o \
>>
>> obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += clock_manager_arria10.o \
>> misc_arria10.o \
>> + pinmux_arria10.o \
>> reset_manager_arria10.o
>>
>> obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o
>> diff --git a/arch/arm/mach-socfpga/include/mach/pinmux.h b/arch/arm/mach-socfpga/include/mach/pinmux.h
>> new file mode 100644
>> index 0000000..c5d5dd6
>> --- /dev/null
>> +++ b/arch/arm/mach-socfpga/include/mach/pinmux.h
>> @@ -0,0 +1,15 @@
>> +/*
>> + * Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0
>> + */
>> +
>> +#ifndef _PINMUX_H_
>> +#define _PINMUX_H_
>
> #ifndef[SPACE]FOO
> #define[SPACE]FOO
>
> please fix globally
Okay.
>
>> +#ifndef __ASSEMBLY__
>> +int config_dedicated_pins(const void *blob);
>> +int config_pins(const void *blob, const char *pin_grp);
>> +#endif
>> +
>> +#endif /* _PINMUX_H_ */
>> diff --git a/arch/arm/mach-socfpga/pinmux_arria10.c b/arch/arm/mach-socfpga/pinmux_arria10.c
>> new file mode 100644
>> index 0000000..47339ea
>> --- /dev/null
>> +++ b/arch/arm/mach-socfpga/pinmux_arria10.c
>> @@ -0,0 +1,96 @@
>> +/*
>> + * Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0
>> + */
>> +
>> +#include <asm/arch/pinmux.h>
>> +#include <asm/io.h>
>> +#include <common.h>
>> +#include <fdtdec.h>
>> +
>> +static int do_pinctr_pin(const void *blob, int child, const char *node_name)
>> +{
>> + int len;
>> + fdt_addr_t base_addr;
>> + fdt_size_t size;
>> + const u32 *cell;
>> + u32 offset, value;
>> +
>> + base_addr = fdtdec_get_addr_size(blob, child, "reg", &size);
>> + if (base_addr != FDT_ADDR_T_NONE) {
>> + cell = fdt_getprop(blob, child, "pinctrl-single,pins",
>> + &len);
>> + if (cell != NULL && len > 0) {
>
> if (!cell)
> continue;
> if (len <= 0)
> continue;
Will change to something like this:
if (!cell || len <= 0)
return -EFAULT;
[...]
Regards
Ley Foon
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