[U-Boot] [PATCH 3/6] rockchip: clk: rk3399: add clocking support for Ethernet

Philipp Tomsich philipp.tomsich at theobroma-systems.com
Fri Mar 24 18:24:25 UTC 2017


The Ethernet driver for the RK3288/3399 GMAC makes sure that the clock
is ungated through a call to clk_set_rate(...). Even though nothing
needs to be done on the RK3399 (the clock gates are open and the clock
is external), we need to implement enough support to at least return
success to enable driver probing.

X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
---

 drivers/clk/rockchip/clk_rk3399.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 453c6dd..1ac4ff4 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -802,6 +802,10 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_EMMC:
 		ret = rk3399_mmc_set_clk(priv->cru, clk->id, rate);
 		break;
+	case SCLK_MAC:
+		/* nothing to do, as this is an external clock */
+		ret = rate;
+		break;
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-- 
1.9.1



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