[U-Boot] [PATCH] ARM: socfpga: Fix broken implementation and enhancing boot header

[tien.fong.chee at intel.com]

From: "Chee, Tien Fong" <tien.fong.chee at intel.com>

Fixing the broken implementation caused by the patch
commit:ce62e57fc57177352a02b76dace0173bd13404b6, ARM: boot0 hook:
remove macro, include whole header file. This patch also enhances
boot header to contain more special data.

Signed-off-by: Chee, Tien Fong <tien.fong.chee at intel.com>
---
 arch/arm/mach-socfpga/include/mach/boot0.h | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h b/arch/arm/mach-socfpga/include/mach/boot0.h
index aaada31..877866a 100644
--- a/arch/arm/mach-socfpga/include/mach/boot0.h
+++ b/arch/arm/mach-socfpga/include/mach/boot0.h
@@ -8,21 +8,23 @@
 #define __BOOT0_H
 
 #ifdef CONFIG_SPL_BUILD
-#define ARM_SOC_BOOT0_HOOK						\
-	.balignl 64,0xf33db33f;						\
-									\
-	.word	0x1337c0d3;	/* SoCFPGA preloader validation word */	\
-	.word	0xc01df00d;	/* Version, flags, length */		\
-	.word	0xcafec0d3;	/* Checksum, zero-pad */		\
-	nop;								\
-									\
-	b reset;		/* SoCFPGA jumps here */		\
-	nop;								\
-	nop;								\
-	nop;
-#else
-#define ARM_SOC_BOOT0_HOOK
+	.balignl 64,0xf33db33f;
+
+	/* Start of header offset */
+	.word	0x1337c0d3; /* SoCFPGA preloader validation word(4B) */
+	.word	0xc01df00d; /* Header length(2B),flags(1B),version(1B) */
+#ifndef CONFIG_TARGET_SOCFPGA_GEN5
+	.word	0xcafec0d3; /* Program length(4B) */
+	.word	0xf00dcafe; /* Program entry offset(4B),relative to  */
+			    /* the start of program header */
 #endif
+	.word	0xfeedface; /* Simple checksum(2B),spare offset(2B) */
+	nop;
 
+	b reset;	    /* SoCFPGA jumps here */
+	nop;
+	nop;
+	nop;
+#endif
 
 #endif /* __BOOT0_H */
-- 
2.7.4