[U-Boot] [PATCH v3 00/19] Add Intel Arria 10 SoC support
Ley Foon Tan
ley.foon.tan at intel.com
Thu Mar 30 13:08:37 UTC 2017
This is the 3rd version of patchset to adds support for Intel Arria 10 SoC.
This version mainly resolved comments from Marek in [v2].
This is initial patchset enables the basic support for Arria 10 and other
features will come after this.
This series is working on top of “arm: socfpga: Move to using distro boot”
series [1] from Dalon Westergreen.
[1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg239560.html
v2 -> v3 changes:
-----------------
- Drop "[PATCH v2 02/20] arm: socfpga: Update clock for Gen5" in [v2] from this
A10 patch series, since it is non Arria 10 related.
- Add socfpga_ prefix for exported functions in reset driver.
- Check return value from wait_for_bit().
- Remove extra parenthesis around statement
- Refactor cm_calc_safe_pll_numer() clock driver.
- Use BIT(n) for bit shifting.
- Resolved warnings and errors from checkpatch.pl.
Patchset history
----------------
[v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg240052.html
[v2]: https://www.mail-archive.com/u-boot@lists.denx.de/msg241249.html
Ley Foon Tan (19):
arm: socfpga: Restructure clock manager driver
arm: socfpga: Restructure reset manager driver
arm: socfpga: Restructure system manager
arm: socfpga: Restructure misc driver
arm: socfpga: Add A10 macros
arm: socfpga: Add reset driver support for Arria 10
arm: socfpga: Add clock driver for Arria 10
arm: socfpga: Add system manager for Arria 10
arm: socfpga: Add sdram header file for Arria 10
arm: socfpga: Add misc support for Arria 10
arm: socfpga: Add pinmux for Arria 10
fdt: Add compatible strings for Arria 10
arm: dts: Add dts and dtsi for Arria 10
arm: socfpga: Add SPL support for Arria 10
drivers: fpga: Add compile switch for Gen5 only registers
arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig
arm: socfpga: Add config and defconfig for Arria 10
arm: socfpga: Add board files for the Arria10
arm: socfpga: Enable build for Arria 10
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_arria10.dtsi | 859 +++++++++++++++
arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 30 +
.../dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi | 481 +++++++++
arch/arm/mach-socfpga/Kconfig | 10 +
arch/arm/mach-socfpga/Makefile | 41 +-
arch/arm/mach-socfpga/clock_manager.c | 525 +---------
arch/arm/mach-socfpga/clock_manager_arria10.c | 1096 ++++++++++++++++++++
.../{clock_manager.c => clock_manager_gen5.c} | 104 +-
arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +-
arch/arm/mach-socfpga/include/mach/clock_manager.h | 317 +-----
.../include/mach/clock_manager_arria10.h | 224 ++++
.../mach/{clock_manager.h => clock_manager_gen5.h} | 151 +--
arch/arm/mach-socfpga/include/mach/misc.h | 31 +
arch/arm/mach-socfpga/include/mach/pinmux.h | 15 +
arch/arm/mach-socfpga/include/mach/reset_manager.h | 50 +-
.../include/mach/reset_manager_arria10.h | 144 +++
.../mach-socfpga/include/mach/reset_manager_gen5.h | 47 +
arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 380 +++++++
.../arm/mach-socfpga/include/mach/system_manager.h | 202 ++--
.../include/mach/system_manager_arria10.h | 81 ++
.../{system_manager.h => system_manager_gen5.h} | 39 +-
arch/arm/mach-socfpga/misc.c | 361 +------
arch/arm/mach-socfpga/misc_arria10.c | 258 +++++
arch/arm/mach-socfpga/{misc.c => misc_gen5.c} | 149 +--
arch/arm/mach-socfpga/pinmux_arria10.c | 96 ++
arch/arm/mach-socfpga/reset_manager.c | 93 +-
arch/arm/mach-socfpga/reset_manager_arria10.c | 389 +++++++
.../{reset_manager.c => reset_manager_gen5.c} | 51 +-
arch/arm/mach-socfpga/spl.c | 74 +-
.../{system_manager.c => system_manager_gen5.c} | 6 +-
board/altera/arria10-socdk/Kconfig | 18 +
board/altera/arria10-socdk/Makefile | 7 +
board/altera/arria10-socdk/socfpga.c | 7 +
configs/socfpga_arria10_defconfig | 28 +
drivers/Kconfig | 2 +
drivers/ddr/Kconfig | 1 +
drivers/ddr/altera/Kconfig | 6 +
drivers/ddr/altera/Makefile | 4 +-
drivers/fpga/socfpga.c | 6 +
include/configs/socfpga_arria10_socdk.h | 66 ++
include/configs/socfpga_common.h | 33 +-
include/dt-bindings/reset/altr,rst-mgr-a10.h | 103 ++
include/fdtdec.h | 8 +
lib/fdtdec.c | 8 +
45 files changed, 4824 insertions(+), 1786 deletions(-)
create mode 100644 arch/arm/dts/socfpga_arria10.dtsi
create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi
create mode 100644 arch/arm/mach-socfpga/clock_manager_arria10.c
copy arch/arm/mach-socfpga/{clock_manager.c => clock_manager_gen5.c} (88%)
create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
copy arch/arm/mach-socfpga/include/mach/{clock_manager.h => clock_manager_gen5.h} (80%)
create mode 100644 arch/arm/mach-socfpga/include/mach/misc.h
create mode 100644 arch/arm/mach-socfpga/include/mach/pinmux.h
create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_arria10.h
create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_arria10.h
copy arch/arm/mach-socfpga/include/mach/{system_manager.h => system_manager_gen5.h} (73%)
create mode 100644 arch/arm/mach-socfpga/misc_arria10.c
copy arch/arm/mach-socfpga/{misc.c => misc_gen5.c} (73%)
create mode 100644 arch/arm/mach-socfpga/pinmux_arria10.c
create mode 100644 arch/arm/mach-socfpga/reset_manager_arria10.c
copy arch/arm/mach-socfpga/{reset_manager.c => reset_manager_gen5.c} (75%)
rename arch/arm/mach-socfpga/{system_manager.c => system_manager_gen5.c} (94%)
create mode 100644 board/altera/arria10-socdk/Kconfig
create mode 100644 board/altera/arria10-socdk/Makefile
create mode 100644 board/altera/arria10-socdk/socfpga.c
create mode 100644 configs/socfpga_arria10_defconfig
create mode 100644 drivers/ddr/Kconfig
create mode 100644 drivers/ddr/altera/Kconfig
create mode 100644 include/configs/socfpga_arria10_socdk.h
create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10.h
--
2.2.0
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