[U-Boot] [PATCH v2 4/6] video: fsl_dcu_fb: Update DCU layers for Vybrid

[Stefan Agner]

On 2017-03-30 00:14, Sanchayan Maity wrote:
> From: Stefan Agner <stefan.agner at toradex.com>
> 
> Users control the graphical content of the panel by manipulating
> configuration of elements in DCU4 called layers. The number of
> layers is different for Vybrid and LS102XA SoC's. Update this
> to reflect for LS102XA accordingly and for use with Vybrid.
> 
> Signed-off-by: Stefan Agner <stefan.agner at toradex.com>
> Signed-off-by: Sanchayan Maity <maitysanchayan at gmail.com>
> ---
>  arch/arm/include/asm/arch-ls102xa/config.h | 1 +
>  drivers/video/fsl_dcu_fb.c                 | 4 +++-
>  2 files changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/include/asm/arch-ls102xa/config.h
> b/arch/arm/include/asm/arch-ls102xa/config.h
> index 2f7233f2fe..7a909c88af 100644
> --- a/arch/arm/include/asm/arch-ls102xa/config.h
> +++ b/arch/arm/include/asm/arch-ls102xa/config.h
> @@ -107,6 +107,7 @@
>  #define CONFIG_SYS_FSL_SRK_LE
>  
>  #define DCU_LAYER_MAX_NUM			16

That is currently used for DCU_MODE_BLEND_ITER, and it actually
overflows the maximum value of BLEND_ITER (for VF610 as well as
LS1021a)! I guess since we blindly shift 20 in DCU_MODE_BLEND_ITER(x),
we actually write the ADDR register (Two-bit value to be added to pixel
red component for dithering), so no real harm there. Still, we should
fix it.

I suggest to do the following:

Add a new patch, and fix fsl_dcu_init, just use the default value of 2
pixel blending:

        dcu_write32(&regs->mode,
                    DCU_MODE_BLEND_ITER(2) |
                    DCU_MODE_RASTER_EN);

Then we also can avoid adding DCU_TOTAL_LAYER_NUM and just use
DCU_LAYER_MAX_NUM for the total layer count...

> +#define DCU_TOTAL_LAYER_NUM			16
>  
>  #ifdef CONFIG_LS102XA
>  #define CONFIG_USB_MAX_CONTROLLER_COUNT		1
> diff --git a/drivers/video/fsl_dcu_fb.c b/drivers/video/fsl_dcu_fb.c
> index a922a91fb2..35550afd63 100644
> --- a/drivers/video/fsl_dcu_fb.c
> +++ b/drivers/video/fsl_dcu_fb.c
> @@ -178,7 +178,7 @@ static void reset_total_layers(void)
>  	struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR;
>  	int i;
>  
> -	for (i = 0; i < DCU_LAYER_MAX_NUM; i++) {
> +	for (i = 0; i < DCU_TOTAL_LAYER_NUM; i++) {

You should also update ctrldescl in struct dcu_reg to use
DCU_TOTAL_LAYER_NUM.

With the above suggestion though, this should be taken care of.

--
Stefan

>  		dcu_write32(&regs->ctrldescl[i][0], 0);
>  		dcu_write32(&regs->ctrldescl[i][1], 0);
>  		dcu_write32(&regs->ctrldescl[i][2], 0);
> @@ -188,8 +188,10 @@ static void reset_total_layers(void)
>  		dcu_write32(&regs->ctrldescl[i][6], 0);
>  		dcu_write32(&regs->ctrldescl[i][7], 0);
>  		dcu_write32(&regs->ctrldescl[i][8], 0);
> +#ifdef CONFIG_LS102XA
>  		dcu_write32(&regs->ctrldescl[i][9], 0);
>  		dcu_write32(&regs->ctrldescl[i][10], 0);
> +#endif
>  	}
>  }