[U-Boot] [PATCH v4 09/11] sun5/7i: add an implementation of the psci suspend function

[Maxime Ripard]

On Tue, May 02, 2017 at 03:27:41PM +0800, Chen-Yu Tsai wrote:
> On Tue, May 2, 2017 at 3:23 PM, Antoine Tenart
> <antoine.tenart at free-electrons.com> wrote:
> > On Tue, May 02, 2017 at 09:04:18AM +0200, Antoine Tenart wrote:
> >> On Mon, May 01, 2017 at 11:13:27PM +0200, Maxime Ripard wrote:
> >> > On Sun, Apr 30, 2017 at 03:29:54PM +0200, Antoine Tenart wrote:
> >> >
> >> > > +static void __secure sunxi_clock_leave_idle(struct sunxi_ccm_reg *ccm)
> >> > > +{
> >> > > +#ifndef CONFIG_MACH_SUN7I
> >> > > + /* switch cpuclk to osc24m */
> >> > > + clrsetbits_le32(&ccm->cpu_ahb_apb0_cfg, 0x3 << CPU_CLK_SRC_SHIFT,
> >> > > +                 CPU_CLK_SRC_OSC24M << CPU_CLK_SRC_SHIFT);
> >> > > +#endif
> >> >
> >> > Is that really needed? Whatever state we're in at this point, we just
> >> > want to switch back to the PLL1, right?
> >>
> >> I think it wasn't working for some reasons if we didn't switch to osc24m
> >> first, but that was a while ago. I can test again.
> >
> > It seems to work without switching back to osc24m first. I'll remove
> > this.
> 
> This is probably going to work badly with the sunxi-ng clock driver
> in Linux, which will temporarily switch over to osc24M while changing
> the clock rate of PLL1, then switch back.

It doesn't do so for the A20, only the later SoCs.

I'm not sure whether using cpufreq and cpuidle at the same time is
valid either.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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