[U-Boot] [PATCH 4/5] armv8: Add workaround for USB erratum A-009008

[yinbo.zhu]

From: Suresh Gupta <suresh.gupta at freescale.com>

USB High Speed (HS) EYE Height Adjustment
This patch is adding the erratum for LS1043 and LS2080 SoCs.

Signed-off-by: Sriram Dash <sriram.dash at nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat at nxp.com>
Signed-off-by: yinbo.zhu <yinbo.zhu at nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c            | 26 ++++++++++++++++++++++
 arch/arm/include/asm/arch-fsl-layerscape/config.h  |  1 +
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  1 +
 3 files changed, 28 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 4e9c718..cb7db48 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -28,6 +28,30 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static void erratum_a009008(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009008
+#if defined(CONFIG_LS1043A) || defined(CONFIG_LS1046A)
+       u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+       u32 val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB1 / 4);
+       val &= ~(0xF << 6);
+       scfg_out32(scfg + SCFG_USB3PRM1CR_USB1 / 4, val|(USB_TXVREFTUNE << 6));
+       val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB2 / 4);
+       val &= ~(0xF << 6);
+       scfg_out32(scfg + SCFG_USB3PRM1CR_USB2 / 4, val|(USB_TXVREFTUNE << 6));
+       val = scfg_in32(scfg + SCFG_USB3PRM1CR_USB3 / 4);
+       val &= ~(0xF << 6);
+       scfg_out32(scfg + SCFG_USB3PRM1CR_USB3 / 4, val|(USB_TXVREFTUNE << 6));
+#elif defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
+       u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+       u32 val = scfg_in32(scfg + SCFG_USB3PRM1CR / 4);
+       val &= ~(0xF << 6);
+       scfg_out32(scfg + SCFG_USB3PRM1CR / 4, val|(USB_TXVREFTUNE << 6));
+#endif
+#endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */
+}
+
+
 static void erratum_a009798(void)
 {
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009798
@@ -288,6 +312,7 @@ void fsl_lsch3_early_init_f(void)
 	erratum_a008514();
 	erratum_a008336();
 	erratum_a009008();
+	erratum_a009008();
 	erratum_a009798();
 	erratum_a008997();
 	erratum_a009007();
@@ -562,6 +587,7 @@ void fsl_lsch2_early_init_f(void)
 	erratum_a009929();
 	erratum_a009660();
 	erratum_a010539();
+	erratum_a009008();
 	erratum_a009798();
 	erratum_a008997();
 	erratum_a009007();
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 7d263fa..b36bdac 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -113,6 +113,7 @@
 #define EPU_EPGCR		0x700060000ULL
 
 #define CONFIG_SYS_FSL_ERRATUM_A008751
+#define CONFIG_SYS_FSL_ERRATUM_A009008
 #define CONFIG_SYS_FSL_ERRATUM_A009798
 #define CONFIG_SYS_FSL_ERRATUM_A008997
 #define CONFIG_SYS_FSL_ERRATUM_A009007
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index c9c92f4..fcb8176 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -143,6 +143,7 @@
 #define SCFG_USB3PRM2CR                 0x004
 #define SCFG_USB3PRM1CR_INIT		0x27672b2a
 #define USB_TXVREFTUNE                 0x9
+#define USB_TXVREFTUNE                 0x9
 #define USB_SQRXTUNE                   0xFC7FFFFF
 #define USB_PCSTXSWINGFULL             0x47
 #define SCFG_QSPICLKCTLR	0x10
-- 
2.1.0.27.g96db324