[U-Boot] [PATCH v4 04/11] arm: select ARM_GIC for SoCs having a psci implementation

Masahiro Yamada yamada.masahiro at socionext.com
Thu May 11 08:00:51 UTC 2017


2017-04-30 22:29 GMT+09:00 Antoine Tenart <antoine.tenart at free-electrons.com>:
> Select the newly introduced ARM_GIC option to the relevant MACH
> configurations.
>
> Signed-off-by: Antoine Tenart <antoine.tenart at free-electrons.com>
> Cc: Albert Aribaud <albert.u.boot at aribaud.net>
> ---
>  arch/arm/Kconfig | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index c7aebae3b039..8b13f6909f9c 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -472,6 +472,7 @@ config ARCH_BCM283X
>
>  config TARGET_VEXPRESS_CA15_TC2
>         bool "Support vexpress_ca15_tc2"
> +       select ARM_GIC
>         select CPU_V7
>         select CPU_V7_HAS_NONSEC
>         select CPU_V7_HAS_VIRT
> @@ -556,14 +557,17 @@ config TARGET_BCM23550_W1D
>
>  config TARGET_BCM28155_AP
>         bool "Support bcm28155_ap"
> +       select ARM_GIC
>         select CPU_V7
>
>  config TARGET_BCMCYGNUS
>         bool "Support bcmcygnus"
> +       select ARM_GIC
>         select CPU_V7
>
>  config TARGET_BCMNSP
>         bool "Support bcmnsp"
> +       select ARM_GIC
>         select CPU_V7
>
>  config TARGET_BCMNS2
> @@ -622,6 +626,7 @@ config ARCH_MX7ULP
>
>  config ARCH_MX7
>         bool "Freescale MX7"
> +       select ARM_GIC
>         select CPU_V7
>         select SYS_FSL_HAS_SEC if SECURE_BOOT
>         select SYS_FSL_SEC_COMPAT_4
> @@ -995,6 +1000,7 @@ config TARGET_LS1012AFRDM
>
>  config TARGET_LS1021AQDS
>         bool "Support ls1021aqds"
> +       select ARM_GIC
>         select BOARD_LATE_INIT
>         select CPU_V7
>         select CPU_V7_HAS_NONSEC
> @@ -1008,6 +1014,7 @@ config TARGET_LS1021AQDS
>
>  config TARGET_LS1021ATWR
>         bool "Support ls1021atwr"
> +       select ARM_GIC
>         select BOARD_LATE_INIT
>         select CPU_V7
>         select CPU_V7_HAS_NONSEC
> @@ -1020,6 +1027,7 @@ config TARGET_LS1021ATWR
>
>  config TARGET_LS1021AIOT
>         bool "Support ls1021aiot"
> +       select ARM_GIC
>         select BOARD_LATE_INIT
>         select CPU_V7
>         select CPU_V7_HAS_NONSEC
> @@ -1100,7 +1108,9 @@ config TARGET_COLIBRI_PXA270
>
>  config ARCH_UNIPHIER
>         bool "Socionext UniPhier SoCs"
> +       select ARM_GIC
>         select BOARD_LATE_INIT
> +       select BLK
>         select CLK_UNIPHIER
>         select DM
>         select DM_GPIO


"select BLK" is totally unrelated, and wrong.
Please remove.

In 07/11, you add "select ARM_GIC" to ARCH_UNIPHIER_32BIT.

Here, "select ARM_GIC" to ARCH_UNIPHER
including 32bit and 64bit.


What is your intention for CONFIG_ARM_GIC?
As far as I see 08, this option is only
effective for ARMv7.




-- 
Best Regards
Masahiro Yamada


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