[U-Boot] [PATCH 2/2] imx: mx6slevk: drop SPL support
Peng Fan
peng.fan at nxp.com
Thu May 11 09:11:47 UTC 2017
Drop the SPL code.
Signed-off-by: Peng Fan <peng.fan at nxp.com>
Cc: Fabio Estevam <fabio.estevam at nxp.com>
Cc: Stefano Babic <sbabic at denx.de>
---
board/freescale/mx6slevk/mx6slevk.c | 191 ------------------------------------
configs/mx6slevk_spl_defconfig | 41 --------
2 files changed, 232 deletions(-)
delete mode 100644 configs/mx6slevk_spl_defconfig
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index d495433..3f8f4d7 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -298,194 +298,3 @@ int checkboard(void)
return 0;
}
-
-#ifdef CONFIG_SPL_BUILD
-#include <spl.h>
-#include <libfdt.h>
-
-#define USDHC1_CD_GPIO IMX_GPIO_NR(4, 7)
-#define USDHC2_CD_GPIO IMX_GPIO_NR(5, 0)
-#define USDHC3_CD_GPIO IMX_GPIO_NR(3, 22)
-
-static struct fsl_esdhc_cfg usdhc_cfg[3] = {
- {USDHC1_BASE_ADDR},
- {USDHC2_BASE_ADDR, 0, 4},
- {USDHC3_BASE_ADDR, 0, 4},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret = 0;
-
- switch (cfg->esdhc_base) {
- case USDHC1_BASE_ADDR:
- ret = !gpio_get_value(USDHC1_CD_GPIO);
- break;
- case USDHC2_BASE_ADDR:
- ret = !gpio_get_value(USDHC2_CD_GPIO);
- break;
- case USDHC3_BASE_ADDR:
- ret = !gpio_get_value(USDHC3_CD_GPIO);
- break;
- }
-
- return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
- struct src *src_regs = (struct src *)SRC_BASE_ADDR;
- u32 val;
- u32 port;
-
- val = readl(&src_regs->sbmr1);
-
- /* Boot from USDHC */
- port = (val >> 11) & 0x3;
- switch (port) {
- case 0:
- imx_iomux_v3_setup_multiple_pads(usdhc1_pads,
- ARRAY_SIZE(usdhc1_pads));
- gpio_direction_input(USDHC1_CD_GPIO);
- usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
- break;
- case 1:
- imx_iomux_v3_setup_multiple_pads(usdhc2_pads,
- ARRAY_SIZE(usdhc2_pads));
- gpio_direction_input(USDHC2_CD_GPIO);
- usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
- usdhc_cfg[0].max_bus_width = 4;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
- break;
- case 2:
- imx_iomux_v3_setup_multiple_pads(usdhc3_pads,
- ARRAY_SIZE(usdhc3_pads));
- gpio_direction_input(USDHC3_CD_GPIO);
- usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
- usdhc_cfg[0].max_bus_width = 4;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- break;
- }
-
- gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
- return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
-}
-
-const struct mx6sl_iomux_ddr_regs mx6_ddr_ioregs = {
- .dram_sdqs0 = 0x00003030,
- .dram_sdqs1 = 0x00003030,
- .dram_sdqs2 = 0x00003030,
- .dram_sdqs3 = 0x00003030,
- .dram_dqm0 = 0x00000030,
- .dram_dqm1 = 0x00000030,
- .dram_dqm2 = 0x00000030,
- .dram_dqm3 = 0x00000030,
- .dram_cas = 0x00000030,
- .dram_ras = 0x00000030,
- .dram_sdclk_0 = 0x00000028,
- .dram_reset = 0x00000030,
- .dram_sdba2 = 0x00000000,
- .dram_odt0 = 0x00000008,
- .dram_odt1 = 0x00000008,
-};
-
-const struct mx6sl_iomux_grp_regs mx6_grp_ioregs = {
- .grp_b0ds = 0x00000030,
- .grp_b1ds = 0x00000030,
- .grp_b2ds = 0x00000030,
- .grp_b3ds = 0x00000030,
- .grp_addds = 0x00000030,
- .grp_ctlds = 0x00000030,
- .grp_ddrmode_ctl = 0x00020000,
- .grp_ddrpke = 0x00000000,
- .grp_ddrmode = 0x00020000,
- .grp_ddr_type = 0x00080000,
-};
-
-const struct mx6_mmdc_calibration mx6_mmcd_calib = {
- .p0_mpdgctrl0 = 0x20000000,
- .p0_mpdgctrl1 = 0x00000000,
- .p0_mprddlctl = 0x4241444a,
- .p0_mpwrdlctl = 0x3030312b,
- .mpzqlp2ctl = 0x1b4700c7,
-};
-
-static struct mx6_lpddr2_cfg mem_ddr = {
- .mem_speed = 800,
- .density = 4,
- .width = 32,
- .banks = 8,
- .rowaddr = 14,
- .coladdr = 10,
- .trcd_lp = 2000,
- .trppb_lp = 2000,
- .trpab_lp = 2250,
- .trasmin = 4200,
-};
-
-static void ccgr_init(void)
-{
- struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-
- writel(0xFFFFFFFF, &ccm->CCGR0);
- writel(0xFFFFFFFF, &ccm->CCGR1);
- writel(0xFFFFFFFF, &ccm->CCGR2);
- writel(0xFFFFFFFF, &ccm->CCGR3);
- writel(0xFFFFFFFF, &ccm->CCGR4);
- writel(0xFFFFFFFF, &ccm->CCGR5);
- writel(0xFFFFFFFF, &ccm->CCGR6);
-
- writel(0x00260324, &ccm->cbcmr);
-}
-
-static void spl_dram_init(void)
-{
- struct mx6_ddr_sysinfo sysinfo = {
- .dsize = mem_ddr.width / 32,
- .cs_density = 20,
- .ncs = 2,
- .cs1_mirror = 0,
- .walat = 0,
- .ralat = 2,
- .mif3_mode = 3,
- .bi_on = 1,
- .rtt_wr = 0, /* LPDDR2 does not need rtt_wr rtt_nom */
- .rtt_nom = 0,
- .sde_to_rst = 0, /* LPDDR2 does not need this field */
- .rst_to_cke = 0x10, /* JEDEC value for LPDDR2: 200us */
- .ddr_type = DDR_TYPE_LPDDR2,
- .refsel = 0, /* Refresh cycles at 64KHz */
- .refr = 3, /* 4 refresh commands per refresh cycle */
- };
- mx6sl_dram_iocfg(32, &mx6_ddr_ioregs, &mx6_grp_ioregs);
- mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr);
-}
-
-void board_init_f(ulong dummy)
-{
- /* setup AIPS and disable watchdog */
- arch_cpu_init();
-
- ccgr_init();
-
- /* iomux and setup of i2c */
- board_early_init_f();
-
- /* setup GP timer */
- timer_init();
-
- /* UART clocks enabled and gd valid - init serial console */
- preloader_console_init();
-
- /* DDR initialization */
- spl_dram_init();
-
- /* Clear the BSS. */
- memset(__bss_start, 0, __bss_end - __bss_start);
-
- /* load/boot image from boot device */
- board_init_r(NULL, 0);
-}
-#endif
diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig
deleted file mode 100644
index 1fd86fc..0000000
--- a/configs/mx6slevk_spl_defconfig
+++ /dev/null
@@ -1,41 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6SLEVK=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-# CONFIG_CMD_BMODE is not set
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6SL,SYS_I2C"
-CONFIG_BOOTDELAY=3
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL=y
-CONFIG_SPL_EXT_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_DM=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_DM_THERMAL=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
--
2.6.2
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