[U-Boot] PPC440 SDRAM Chip Select

[Amin Sahebi]

Dear all,

Hi,
Regarding to my hardware restriction on routing and specific design
considerations, I need to set SDRAM0_CFG0 , SDRAM0_CFG1 , SDRAM0_B0CR and
probably other registers to make PPC440 to initialize SDRAM always and set
SDRAM chip select Electrically directly to the DGND,

I made some modifications on config file in BDI3000 JTAG emulator for my
board but I have trouble with them and cannot initial the SDRAM properly:

------JTAG BDI3000 Config file for SDRAM registers------

; Setup SDRAM Controller (DDR SDRAM)
WDCR    0x10    0x00000082    ;Select SDRAM0_CLKTR
WDCR    0x11    0x40000000    ;CLKTR: Advance 90 degrees
WDCR    0x10    0x00000080    ;Select SDRAM0_TR0
WDCR    0x11    0x410a4012    ;TR0:
WDCR    0x10    0x00000081    ;Select SDRAM0_TR1
WDCR    0x11    0x80800840    ;TR1:
WDCR    0x10    0x00000040    ;Select SDRAM0_B0CR
WDCR    0x11    0x000a4001    ;B0CR:
WDCR    0x10    0x00000030    ;Select SDRAM0_RTR
WDCR    0x11    0x04080000    ;RTR:
WDCR    0x10    0x00000020    ;Select SDRAM0_CFG0
WDCR    0x11    0x04000000    ;CFG0: 32bit, PMU disable
WDCR    0x11    0x84000000    ;CFG0: enable SDRAM

-------[FLASH]----

WORKSPACE   0x00004000
CHIPSIZE    0x80000
BUSWIDTH    8
FORMAT      BIN 0xfff80000
ERASE       0xfff80000  0x20000 4  ;erase 4 x 128kB

I'm afraid that PPC architecture support this solution! I got this error
when I want to program the flash:

*#Programming flash memory failed at 0xfff80001 *

I using PPC440EP architecture, Micron 128MB SDRAM, Yosemite AMCC evaluation
board, BDI3000 JTAG Interface,

I appreciate any suggestion,
Thanks


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