[U-Boot] [PATCH 15/15] uboot: Kconfig: add ERRATUM config to Kconfig for solve compile issue.

[yinbo.zhu]

add erratum config to Kconfig and instead of config.h's config
for solve ls2080rdb compiling issue

Signed-off-by: Sriram Dash <sriram.dash at nxp.com>
Signed-off-by: yinbo.zhu <yinbo.zhu at nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig              | 4 ++++
 arch/arm/include/asm/arch-fsl-layerscape/config.h      | 7 -------
 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +
 3 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 4b87dd2..fb2a9ba 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -107,6 +107,10 @@ config ARCH_LS2080A
 	select SYS_FSL_ERRATUM_A009942
 	select SYS_FSL_ERRATUM_A010165
 	select SYS_FSL_ERRATUM_A009203
+	select SYS_FSL_ERRATUM_A008997
+	select SYS_FSL_ERRATUM_A009007
+	select SYS_FSL_ERRATUM_A009008
+	select SYS_FSL_ERRATUM_A009798
 	select SYS_FSL_HAS_CCN504
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index b36bdac..8f66938 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -113,13 +113,6 @@
 #define EPU_EPGCR		0x700060000ULL
 
 #define CONFIG_SYS_FSL_ERRATUM_A008751
-#define CONFIG_SYS_FSL_ERRATUM_A009008
-#define CONFIG_SYS_FSL_ERRATUM_A009798
-#define CONFIG_SYS_FSL_ERRATUM_A008997
-#define CONFIG_SYS_FSL_ERRATUM_A009007
-#define CONFIG_SYS_FSL_ERRATUM_A010165
-
-
 
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC		1
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 24523eb..27c90fc 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -130,6 +130,7 @@
 #define DCFG_RCWSR15_IFCGRPABASE_QSPI	0x3
 
 #define DCFG_DCSR_BASE		0X700100000ULL
+#define DCSR_BASE              0x700000000ULL
 #define DCSR_USB_PHY1                  0x4600000
 #define DCSR_USB_PHY2                  0x4610000
 #define DCSR_USB_PHY_RX_OVRD_IN_HI     0x1006
-- 
2.1.0.27.g96db324