[U-Boot] [PATCH 24/33] mmc: sdhci: rockchip: fix bus width setting

Ziyuan Xu xzy.xu at rock-chips.com
Mon May 15 06:07:18 UTC 2017


Rockchip sdhci controller capable of 8-bit transfer. The original can
only run at 4 bit mode.

Signed-off-by: Ziyuan Xu <xzy.xu at rock-chips.com>
---

 drivers/mmc/rockchip_sdhci.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index bdde831..562fb35 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -47,11 +47,26 @@ static int arasan_sdhci_probe(struct udevice *dev)
 
 	host->name = dev->name;
 	host->ioaddr = map_sysmem(dtplat->reg[1], dtplat->reg[3]);
+	host->host_caps |= MMC_MODE_8BIT;
 	max_frequency = dtplat->max_frequency;
 	ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &clk);
 #else
 	max_frequency = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 			"max-frequency", 0);
+	switch (fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+			       "bus-width", 4)) {
+	case 8:
+		host->host_caps |= MMC_MODE_8BIT;
+		break;
+	case 4:
+		host->host_caps |= MMC_MODE_4BIT;
+		break;
+	case 1:
+		break;
+	default:
+		printf("Invalid \"bus-width\" value\n");
+		return -EINVAL;
+	}
 	ret = clk_get_by_index(dev, 0, &clk);
 #endif
 	if (!ret) {
-- 
2.7.4




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