[U-Boot] [PATCH] rockchip: Add basic support for phyCORE-RK3288 SoM based carrier board
Wadim Egorov
w.egorov at phytec.de
Mon May 15 13:49:35 UTC 2017
Hi,
Am 15.05.2017 um 05:02 schrieb Simon Glass:
> Hi,
>
> On 8 May 2017 at 07:18, Wadim Egorov <w.egorov at phytec.de> wrote:
>> The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC.
>> The module can be connected to different carrier boards.
>> It can be also equipped with different RAM, SPI flash and eMMC variants.
>> The Rapid Development Kit option is using the following setup:
>>
>> - 1 GB DDR3 RAM (2 Banks)
>> - 1x 4 KB EEPROM
>> - DP83867 Gigabit Ethernet PHY
>> - 16 MB SPI Flash
>> - 4 GB eMMC Flash
>>
>> Add basic support for the PCM-947 carrier board, a RK3288 based development
>> board made by PHYTEC. This board works in a combination with
>> the phyCORE-RK3288 System on Module.
>>
>> Signed-off-by: Wadim Egorov <w.egorov at phytec.de>
>> ---
>> arch/arm/dts/Makefile | 1 +
>> arch/arm/dts/rk3288-phycore-rdk.dts | 289 +++++++++++++++
>> arch/arm/dts/rk3288-phycore-som.dtsi | 503 +++++++++++++++++++++++++++
>> arch/arm/mach-rockchip/rk3288-board-spl.c | 33 +-
>> arch/arm/mach-rockchip/rk3288/Kconfig | 11 +
>> board/phytec/phycore_rk3288/Kconfig | 15 +
>> board/phytec/phycore_rk3288/MAINTAINERS | 6 +
>> board/phytec/phycore_rk3288/Makefile | 8 +
>> board/phytec/phycore_rk3288/phycore-rk3288.c | 16 +
>> configs/phycore-rk3288_defconfig | 69 ++++
>> include/configs/phycore_rk3288.h | 23 ++
>> 11 files changed, 973 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/dts/rk3288-phycore-rdk.dts
>> create mode 100644 arch/arm/dts/rk3288-phycore-som.dtsi
>> create mode 100644 board/phytec/phycore_rk3288/Kconfig
>> create mode 100644 board/phytec/phycore_rk3288/MAINTAINERS
>> create mode 100644 board/phytec/phycore_rk3288/Makefile
>> create mode 100644 board/phytec/phycore_rk3288/phycore-rk3288.c
>> create mode 100644 configs/phycore-rk3288_defconfig
>> create mode 100644 include/configs/phycore_rk3288.h
> Reviewed-by: Simon Glass <sjg at chromium.org>
>
> But a few comments below.
>
> [..]
>
>> diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
>> index 74f3379..d1cdc91 100644
>> --- a/arch/arm/mach-rockchip/rk3288-board-spl.c
>> +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
>> @@ -8,6 +8,7 @@
>> #include <debug_uart.h>
>> #include <dm.h>
>> #include <fdtdec.h>
>> +#include <i2c.h>
>> #include <led.h>
>> #include <malloc.h>
>> #include <ram.h>
>> @@ -25,6 +26,7 @@
>> #include <dm/test.h>
>> #include <dm/util.h>
>> #include <power/regulator.h>
>> +#include <power/rk8xx_pmic.h>
>>
>> DECLARE_GLOBAL_DATA_PTR;
>>
>> @@ -162,7 +164,10 @@ void board_init_f(ulong dummy)
>> struct udevice *pinctrl;
>> struct udevice *dev;
>> int ret;
>> -
>> +#if defined(CONFIG_TARGET_PHYCORE_RK3288)
>> + struct udevice *pmic;
>> + uint reg;
>> +#endif
>> /* Example code showing how to enable the debug UART on RK3288 */
>> #ifdef EARLY_UART
>> #include <asm/arch/grf_rk3288.h>
>> @@ -206,6 +211,32 @@ void board_init_f(ulong dummy)
>> return;
>> }
>>
>> +#if defined(CONFIG_TARGET_PHYCORE_RK3288)
> Can you please put all of this in a separate function? Also does it
> bloat the code too much to use of_machine_is_compatible() instead of
> #ifdef?
I will add a separate function for the phycore initialization in v2.
No other rockchip board used of_machine_is_compatible(). But I can do this.
This increases the SPL about 500 bytes, so I think it should be fine.
>
>> + ret = uclass_get_device(UCLASS_I2C, 0, &dev);
>> + if (ret) {
>> + debug("I2C init failed: %d\n", ret);
>> + return;
>> + }
>> +
>> + ret = i2c_get_chip(dev, 0x1c, 1, &pmic);
>> + if (ret) {
>> + debug("Cannot find RK818: %d\n", ret);
>> + return;
>> + }
>> +
>> + reg = dm_i2c_reg_read(pmic, REG_USB_CTRL);
>> +
>> + /*
>> + * Increase USB input current selection to 2A and close charger
>> + * when usb lower then 3.4V.
>> + */
>> + reg |= 0x77;
>> + ret = dm_i2c_reg_write(pmic, REG_USB_CTRL, reg);
>> + if (ret) {
>> + debug("Unable to set RK818 REG_USB_CTRL: %d\n", ret);
>> + return;
>> + }
>> +#endif
>> ret = uclass_get_device(UCLASS_RAM, 0, &dev);
>> if (ret) {
>> debug("DRAM init failed: %d\n", ret);
>> diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
>> index 8e7355e..796d731 100644
>> --- a/arch/arm/mach-rockchip/rk3288/Kconfig
>> +++ b/arch/arm/mach-rockchip/rk3288/Kconfig
>> @@ -66,6 +66,15 @@ config TARGET_MIQI_RK3288
>> has 1 or 2 GiB SDRAM. Expansion connectors provide access to
>> I2C, SPI, UART, GPIOs and fan control.
>>
>> +config TARGET_PHYCORE_RK3288
>> + bool "phyCORE-RK3288"
>> + select BOARD_LATE_INIT
>> + help
>> + Add basic support for the PCM-947 carrier board, a RK3288 based
>> + development board made by PHYTEC. This board works in a combination
>> + with the phyCORE-RK3288 System on Module.
>> +
>> +
>> config TARGET_POPMETAL_RK3288
>> bool "PopMetal-RK3288"
>> select BOARD_LATE_INIT
>> @@ -129,6 +138,8 @@ source "board/google/veyron/Kconfig"
>>
>> source "board/mqmaker/miqi_rk3288/Kconfig"
>>
>> +source "board/phytec/phycore_rk3288/Kconfig"
>> +
>> source "board/radxa/rock2/Kconfig"
>>
>> source "board/rockchip/evb_rk3288/Kconfig"
>> diff --git a/board/phytec/phycore_rk3288/Kconfig b/board/phytec/phycore_rk3288/Kconfig
>> new file mode 100644
>> index 0000000..57cd8e2
>> --- /dev/null
>> +++ b/board/phytec/phycore_rk3288/Kconfig
>> @@ -0,0 +1,15 @@
>> +if TARGET_PHYCORE_RK3288
>> +
>> +config SYS_BOARD
>> + default "phycore_rk3288"
>> +
>> +config SYS_VENDOR
>> + default "phytec"
>> +
>> +config SYS_CONFIG_NAME
>> + default "phycore_rk3288"
>> +
>> +config BOARD_SPECIFIC_OPTIONS # dummy
>> + def_bool y
>> +
>> +endif
>> diff --git a/board/phytec/phycore_rk3288/MAINTAINERS b/board/phytec/phycore_rk3288/MAINTAINERS
>> new file mode 100644
>> index 0000000..9c0de3c
>> --- /dev/null
>> +++ b/board/phytec/phycore_rk3288/MAINTAINERS
>> @@ -0,0 +1,6 @@
>> +phyCORE-RK3288
>> +M: Wadim Egorov <w.egorov at phytec.de>
>> +S: Maintained
>> +F: board/phytec/phycore_rk3288
>> +F: include/configs/phycore_rk3288.h
>> +F: configs/phycore-rk3288_defconfig
>> diff --git a/board/phytec/phycore_rk3288/Makefile b/board/phytec/phycore_rk3288/Makefile
>> new file mode 100644
>> index 0000000..f379fbe
>> --- /dev/null
>> +++ b/board/phytec/phycore_rk3288/Makefile
>> @@ -0,0 +1,8 @@
>> +#
>> +# Copyright (C) 2017 PHYTEC Messtechnik GmbH
>> +# Author: Wadim Egorov <w.egorov at phytec.de>
>> +#
>> +# SPDX-License-Identifier: GPL-2.0+
>> +#
>> +
>> +obj-y += phycore-rk3288.o
>> diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
>> new file mode 100644
>> index 0000000..c8c24e8
>> --- /dev/null
>> +++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
>> @@ -0,0 +1,16 @@
>> +/*
>> + * Copyright (C) 2017 PHYTEC Messtechnik GmbH
>> + * Author: Wadim Egorov <w.egorov at phytec.de>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include <common.h>
>> +#include <spl.h>
>> +
>> +void board_boot_order(u32 *spl_boot_list)
>> +{
>> + /* eMMC prior to sdcard. */
>> + spl_boot_list[0] = BOOT_DEVICE_MMC2;
>> + spl_boot_list[1] = BOOT_DEVICE_MMC1;
>> +}
> For this, can you use the device tree and spl_boot_device() ?
Yes, I can do this.
Thanks
Wadim
>
>> diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
>> new file mode 100644
>> index 0000000..2c608d1
>> --- /dev/null
>> +++ b/configs/phycore-rk3288_defconfig
>> @@ -0,0 +1,69 @@
>> +CONFIG_ARM=y
>> +CONFIG_ARCH_ROCKCHIP=y
>> +CONFIG_SYS_MALLOC_F_LEN=0x2000
>> +CONFIG_ROCKCHIP_RK3288=y
>> +CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
>> +CONFIG_TARGET_PHYCORE_RK3288=y
>> +CONFIG_SPL_STACK_R_ADDR=0x80000
>> +CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
>> +CONFIG_SILENT_CONSOLE=y
>> +CONFIG_CONSOLE_MUX=y
>> +# CONFIG_DISPLAY_CPUINFO is not set
>> +CONFIG_SPL_STACK_R=y
>> +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
>> +# CONFIG_CMD_IMLS is not set
>> +CONFIG_CMD_GPT=y
>> +CONFIG_CMD_MMC=y
>> +CONFIG_CMD_SF=y
>> +CONFIG_CMD_SPI=y
>> +CONFIG_CMD_I2C=y
>> +CONFIG_CMD_USB=y
>> +CONFIG_CMD_GPIO=y
>> +# CONFIG_CMD_SETEXPR is not set
>> +CONFIG_CMD_CACHE=y
>> +CONFIG_CMD_TIME=y
>> +CONFIG_CMD_PMIC=y
>> +CONFIG_CMD_REGULATOR=y
>> +# CONFIG_SPL_DOS_PARTITION is not set
>> +# CONFIG_SPL_ISO_PARTITION is not set
>> +# CONFIG_SPL_EFI_PARTITION is not set
>> +CONFIG_SPL_PARTITION_UUIDS=y
>> +CONFIG_SPL_OF_CONTROL=y
>> +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>> +CONFIG_REGMAP=y
>> +CONFIG_SPL_REGMAP=y
>> +CONFIG_SYSCON=y
>> +CONFIG_SPL_SYSCON=y
>> +CONFIG_SPL_I2C_SUPPORT=y
>> +# CONFIG_SPL_SIMPLE_BUS is not set
>> +CONFIG_CLK=y
>> +CONFIG_SPL_CLK=y
>> +CONFIG_ROCKCHIP_GPIO=y
>> +CONFIG_SYS_I2C_ROCKCHIP=y
>> +CONFIG_MMC_DW=y
>> +CONFIG_MMC_DW_ROCKCHIP=y
>> +CONFIG_DM_ETH=y
>> +CONFIG_ETH_DESIGNWARE=y
>> +CONFIG_GMAC_ROCKCHIP=y
>> +CONFIG_PINCTRL=y
>> +CONFIG_SPL_PINCTRL=y
>> +# CONFIG_SPL_PINCTRL_FULL is not set
>> +CONFIG_PINCTRL_ROCKCHIP_RK3288=y
>> +CONFIG_DM_PMIC=y
>> +CONFIG_PMIC_RK8XX=y
>> +CONFIG_DM_REGULATOR_FIXED=y
>> +CONFIG_REGULATOR_RK8XX=y
>> +CONFIG_PWM_ROCKCHIP=y
>> +CONFIG_RAM=y
>> +CONFIG_SPL_RAM=y
>> +CONFIG_DEBUG_UART=y
>> +CONFIG_DEBUG_UART_BASE=0xff690000
>> +CONFIG_DEBUG_UART_CLOCK=24000000
>> +CONFIG_DEBUG_UART_SHIFT=2
>> +CONFIG_SYS_NS16550=y
>> +CONFIG_SYSRESET=y
>> +CONFIG_USB=y
>> +CONFIG_USB_STORAGE=y
>> +CONFIG_USE_TINY_PRINTF=y
>> +CONFIG_CMD_DHRYSTONE=y
>> +CONFIG_ERRNO_STR=y
>> diff --git a/include/configs/phycore_rk3288.h b/include/configs/phycore_rk3288.h
>> new file mode 100644
>> index 0000000..aab43ed
>> --- /dev/null
>> +++ b/include/configs/phycore_rk3288.h
>> @@ -0,0 +1,23 @@
>> +/*
>> + * Copyright (C) 2017 PHYTEC Messtechnik GmbH
>> + * Author: Wadim Egorov <w.egorov at phytec.de>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#ifndef __CONFIG_H
>> +#define __CONFIG_H
>> +
>> +#define ROCKCHIP_DEVICE_SETTINGS
>> +#include <configs/rk3288_common.h>
>> +
>> +#undef BOOT_TARGET_DEVICES
>> +
>> +#define BOOT_TARGET_DEVICES(func) \
>> + func(MMC, mmc, 0) \
>> + func(MMC, mmc, 1)
>> +
>> +#define CONFIG_ENV_IS_IN_MMC
>> +#define CONFIG_SYS_MMC_ENV_DEV 1
>> +
>> +#endif
>> --
>> 1.9.1
>>
> Regards,
> Simon
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