[U-Boot] [PATCH 1/3] usb: host: xhci-dwc3: Convert driver to DM

[Patrice CHOTARD]

Hi Marek

On 05/19/2017 12:06 PM, Marek Vasut wrote:
> On 05/19/2017 09:15 AM, patrice.chotard at st.com wrote:
>> From: Patrice Chotard <patrice.chotard at st.com>
>>
>> Add Driver Model support with use of generic DT
>> compatible string "snps,dwc3"
>>
>> Signed-off-by: Patrice Chotard <patrice.chotard at st.com>
>> ---
>>   drivers/usb/host/xhci-dwc3.c | 71 ++++++++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 71 insertions(+)
>>
>> diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
>> index 33961cd..b0b9076 100644
>> --- a/drivers/usb/host/xhci-dwc3.c
>> +++ b/drivers/usb/host/xhci-dwc3.c
>> @@ -9,9 +9,23 @@
>>    */
>>   
>>   #include <common.h>
>> +#include <dm.h>
>> +#include <usb.h>
>> +
>> +#include "xhci.h"
>>   #include <asm/io.h>
>>   #include <linux/usb/dwc3.h>
>>   
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +struct xhci_dwc3_platdata {
>> +	phys_addr_t dwc3_regs;
>> +};
> 
> Since you have DM, do you need this ?

Ah yes, effectively, i can remove that

> 
>> +struct xhci_dwc3_priv {
>> +	struct xhci_ctrl ctrl;
>> +};
>> +
>>   void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
>>   {
>>   	clrsetbits_le32(&dwc3_reg->g_ctl,
>> @@ -97,3 +111,60 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
>>   	setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
>>   			GFLADJ_30MHZ(val));
>>   }
>> +
>> +static int xhci_dwc3_ofdata_to_platdata(struct udevice *dev)
>> +{
>> +	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
>> +	u32 reg[2];
>> +
>> +	/* get the dwc3 register space base address */
>> +	if (fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), "reg", reg,
>> +				 ARRAY_SIZE(reg))) {
> 
> dev_get_addr() ?

Agree, i will fix it

Thanks

Patrice

> 
>> +		debug("dwc3 node has bad/missing 'reg' property\n");
>> +		return -FDT_ERR_NOTFOUND;
>> +	}
>> +	plat->dwc3_regs = reg[0];
>> +
>> +	return 0;
>> +}
>> +
>> +static int xhci_dwc3_probe(struct udevice *dev)
>> +{
>> +	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
>> +	struct xhci_hcor *hcor;
>> +	struct xhci_hccr *hccr;
>> +	struct dwc3 *dwc3_reg;
>> +
>> +	hccr = (struct xhci_hccr *)plat->dwc3_regs;
>> +	hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
>> +			HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
>> +
>> +	dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
>> +
>> +	dwc3_core_init(dwc3_reg);
>> +
>> +	return xhci_register(dev, hccr, hcor);
>> +}
>> +
>> +static int xhci_dwc3_remove(struct udevice *dev)
>> +{
>> +	return xhci_deregister(dev);
>> +}
>> +
>> +static const struct udevice_id xhci_dwc3_ids[] = {
>> +	{ .compatible = "snps,dwc3" },
>> +	{ }
>> +};
>> +
>> +U_BOOT_DRIVER(xhci_dwc3) = {
>> +	.name = "xhci-dwc3",
>> +	.id = UCLASS_USB,
>> +	.of_match = xhci_dwc3_ids,
>> +	.ofdata_to_platdata = xhci_dwc3_ofdata_to_platdata,
>> +	.probe = xhci_dwc3_probe,
>> +	.remove = xhci_dwc3_remove,
>> +	.ops = &xhci_usb_ops,
>> +	.priv_auto_alloc_size = sizeof(struct xhci_dwc3_priv),
>> +	.platdata_auto_alloc_size = sizeof(struct xhci_dwc3_platdata),
>> +	.flags = DM_FLAG_ALLOC_PRIV_DMA,
>> +};
>>
> 
>