[U-Boot] [RFC PATCH 3/5] rockchip: enable BOOT0_HOOK for SoCs

Kever Yang kever.yang at rock-chips.com
Wed May 31 10:50:38 UTC 2017


Rockchip SoCs bootrom design is like this:
- First 2KB or 4KB internal memory is for bootrom stack and heap;
- Then the first 4-byte suppose to be a TAG like 'RK33';
- The the following memory address end with '0004' is the first
  instruction load and running by bootrom;

Let's use the boot0 hook to reserve the first 4-byte tag for all
the Rockchip SoCs.

Signed-off-by: Kever Yang <kever.yang at rock-chips.com>
---

 arch/arm/mach-rockchip/Kconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 740dbdf..82aa2d2 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -5,6 +5,7 @@ config ROCKCHIP_RK3036
 	select CPU_V7
 	select SUPPORT_SPL
 	select SPL
+	select ENABLE_ARM_SOC_BOOT0_HOOK
 	help
 	  The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -20,6 +21,7 @@ config ROCKCHIP_RK3188
 	select TPL
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
+	select ENABLE_ARM_SOC_BOOT0_HOOK
 	help
 	  The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
 	  including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
@@ -32,6 +34,7 @@ config ROCKCHIP_RK3288
 	select CPU_V7
 	select SUPPORT_SPL
 	select SPL
+	select ENABLE_ARM_SOC_BOOT0_HOOK
 	help
 	  The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
-- 
1.9.1



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