[U-Boot] [PATCH 4/4] rockchip: dts: rk3399-puma: select DRAM timing via Kconfig

[Philipp Tomsich]

The RK3399-Q7 has multiple build-options for its DRAM configuration,
including the timing of the DRAM components populated.

While DDR3-1600 is the standard configuration, custom-configurations
are available with DDR3-1333 (for a further cost-optimisation) and
with DDR3-1866 (as a premium option).

To simplify our test automation (without the need to maintain 3
different defconfigs) and customer evaluation, we make this selectable
via Kconfig.

Signed-off-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
---

 arch/arm/dts/rk3399-puma.dts                |  8 +++++++
 board/theobroma-systems/puma_rk3399/Kconfig | 37 +++++++++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts
index fca14d3..41d32eb 100644
--- a/arch/arm/dts/rk3399-puma.dts
+++ b/arch/arm/dts/rk3399-puma.dts
@@ -8,7 +8,15 @@
 
 #include <dt-bindings/pwm/pwm.h>
 #include "rk3399.dtsi"
+#if defined(CONFIG_SYS_TSD_PUMA_DDR3_1333)
+#include "rk3399-sdram-ddr3-1333.dtsi"
+#elif defined(CONFIG_SYS_TSD_PUMA_DDR3_1600)
 #include "rk3399-sdram-ddr3-1600.dtsi"
+#elif defined(CONFIG_SYS_TSD_PUMA_DDR3_1866)
+#include "rk3399-sdram-ddr3-1866.dtsi"
+#else
+#error "Unknown memory timing configuration for the RK3399-Q7"
+#endif
 
 / {
 	model = "Theobroma Systems RK3399-Q7 SoM";
diff --git a/board/theobroma-systems/puma_rk3399/Kconfig b/board/theobroma-systems/puma_rk3399/Kconfig
index a645590..1773648 100644
--- a/board/theobroma-systems/puma_rk3399/Kconfig
+++ b/board/theobroma-systems/puma_rk3399/Kconfig
@@ -12,4 +12,41 @@ config SYS_CONFIG_NAME
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 
+if SPL
+
+choice
+	prompt "RK3399-Q7 DRAM timings"
+        default SYS_TSD_PUMA_DDR3_1600
+        help
+	  The RK3399-Q7 module is orderable in multiple memory
+          configurations, which may also differ in the timings used.
+
+          DDR3-1600 is the standard configuration, but both DDR3-1333
+          (for potential cost-optimisation) and DDR3-1866 (as a
+          premium option) are fully validated in the design.
+
+	  The setting of this option is used to select the appropriate
+	  timings for inclusion in the device tree controlling DRAM
+	  initialisation during the board-initialisation performed by
+	  the SPL stage.
+
+config SYS_TSD_PUMA_DDR3_1333
+        bool "DDR3-1333 timings"
+        help
+	  Use DDR3-1333 timings for the DRAM setup of the RK3399-Q7.
+
+config SYS_TSD_PUMA_DDR3_1600
+        bool "DDR3-1600 timings"
+        help
+	  Use DDR3-1600 timings for the DRAM setup of the RK3399-Q7.
+
+config SYS_TSD_PUMA_DDR3_1866
+        bool "DDR3-1866 timings"
+        help
+	  Use DDR3-1866 timings for the DRAM setup of the RK3399-Q7.
+
+endchoice
+
+endif
+
 endif
-- 
1.9.1