[U-Boot] [PATCH v4 10/18] rockchip: boot0 hook: support early return for RK3188/RK3066-style BROM

[Andy Yan]

Hi Philipp:


On 2017年10月10日 18:50, Dr. Philipp Tomsich wrote:
>
>> On 10 Oct 2017, at 11:22, Andy Yan <andy.yan at rock-chips.com 
>> <mailto:andy.yan at rock-chips.com>> wrote:
>>
>> Hi:
>>
>>
>> On 2017年10月10日 17:01, Andy Yan wrote:
>>> Hi Philipp:
>>>
>>> On 2017年10月07日 03:28, Philipp Tomsich wrote:
>>>> Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 
>>>> 1KB data
>>>> from NAND into SRAM and executes it. Then, following a return to 
>>>> bootrom, the
>>>> BROM loads additional code to SRAM (not overwriting the first block 
>>>> read) and
>>>> reenters at the same address as the first time.
>>>>
>>>> To support booting either a TPL (on the RK3066) or SPL (on the 
>>>> RK3188) using
>>>> this model of having to count entries, this commit adds code to the 
>>>> boot0
>>>> hook to track the number of entries and handle them accordingly.
>>>>
>>>> Signed-off-by: Philipp Tomsich 
>>>> <philipp.tomsich at theobroma-systems.com 
>>>> <mailto:philipp.tomsich at theobroma-systems.com>>
>>>> Signed-off-by: Paweł Jarosz <paweljarosz3691 at gmail.com 
>>>> <mailto:paweljarosz3691 at gmail.com>>
>>>> ---
>>>>
>>>> Changes in v4: None
>>>> Changes in v3: None
>>>> Changes in v2: None
>>>>
>>>> arch/arm/include/asm/arch-rockchip/boot0.h | 24 
>>>> ++++++++++++++++++------
>>>> arch/arm/mach-rockchip/Kconfig | 28 ++++++++++++++++++++++++++++
>>>> 2 files changed, 46 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h 
>>>> b/arch/arm/include/asm/arch-rockchip/boot0.h
>>>> index f7c6146..06091d0 100644
>>>> --- a/arch/arm/include/asm/arch-rockchip/boot0.h
>>>> +++ b/arch/arm/include/asm/arch-rockchip/boot0.h
>>>> @@ -19,12 +19,24 @@
>>>> * beginning of the executable.     However, as we want to keep
>>>> * this generic and make it applicable to builds that are like
>>>> * the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no
>>>> -     * TPL, but extra space needed in the SPL), we simply repeat
>>>> -     * the 'b reset' with the expectation that the first one will
>>>> -     * be overwritten, if this is the first stage contained in the
>>>> -     * final image created with mkimage)...
>>>> +     * TPL, but extra space needed in the SPL), we simply insert
>>>> +     * a branch-to-next-instruction-word with the expectation that
>>>> +     * the first one may be overwritten, if this is the first stage
>>>> +     * contained in the final image created with mkimage)...
>>>> */
>>>> -    b reset     /* may be overwritten --- should be 'nop' or a 'b 
>>>> reset' */
>>>> +    b 1f     /* if overwritten, entry-address is at the next word */
>>>> +1:
>>>> +#endif
>>>> +#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
>>>> +    adr     r3, entry_counter
>>>> +    ldr    r0, [r3]
>>>> +    cmp    r0, #1           /* check if entry_counter == 1 */
>>>> +    beq    reset            /* regular bootup */
>>>> +    add     r0, #1
>>>> +    str    r0, [r3]         /* increment the entry_counter in 
>>>> memory */
>>
>>     It seems that we need to clear r0 to zero before return to 
>> bootrom, a non-zero return value will drive the system to bootrom 
>> download mode.
>
> Did you test if clearing the r0-register before returning fixes this 
> and we boot through into SPL?
> If so, I’ll create a v5 of the patch … if not, we will need to dig 
> deeper to determine why this does not work as expected.

     Yes, we can boot into uboot shell if clear r0 before return to 
bootrom from here.
>
>>>> +    bx lr               /* return to bootrom */
>>> This seems not work on rk3188, When I track the code flow with DS-5, I
>>> found the entry_counter always be zero when we run here from 
>>> bootrom(even it is set to 1 before return to bootrom), so it return 
>>> to bootrom again and again.
>>>> +entry_counter:
>>>> +    .word   0
>>>> #endif
>>>> b reset
>>>> #if !defined(CONFIG_ARM64)
>>>> @@ -32,7 +44,7 @@
>>>> * For armv7, the addr '_start' will used as vector start address
>>>> * and write to VBAR register, which needs to aligned to 0x20.
>>>> */
>>>> -    .align(5)
>>>> +    .align(5), 0x0
>>>> _start:
>>>> ARM_VECTORS
>>>> #endif
>>>> diff --git a/arch/arm/mach-rockchip/Kconfig 
>>>> b/arch/arm/mach-rockchip/Kconfig
>>>> index 31e9864..d59a1d5 100644
>>>> --- a/arch/arm/mach-rockchip/Kconfig
>>>> +++ b/arch/arm/mach-rockchip/Kconfig
>>>> @@ -158,6 +158,34 @@ config ROCKCHIP_SPL_RESERVE_IRAM
>>>> config ROCKCHIP_BROM_HELPER
>>>> bool
>>>> +config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
>>>> +        bool "SPL requires early-return (for RK3188-style BROM) to 
>>>> BROM"
>>>> +    depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
>>>> +    help
>>>> +      Some Rockchip BROM variants (e.g. on the RK3188) load the
>>>> +      first stage in segments and enter multiple times. E.g. on
>>>> +      the RK3188, the first 1KB of the first stage are loaded
>>>> +      first and entered; after returning to the BROM, the
>>>> +      remainder of the first stage is loaded, but the BROM
>>>> +      re-enters at the same address/to the same code as previously.
>>>> +
>>>> +      This enables support code in the BOOT0 hook for the SPL stage
>>>> +      to allow multiple entries.
>>>> +
>>>> +config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
>>>> +        bool "TPL requires early-return (for RK3188-style BROM) to 
>>>> BROM"
>>>> +    depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
>>>> +    help
>>>> +      Some Rockchip BROM variants (e.g. on the RK3188) load the
>>>> +      first stage in segments and enter multiple times. E.g. on
>>>> +      the RK3188, the first 1KB of the first stage are loaded
>>>> +      first and entered; after returning to the BROM, the
>>>> +      remainder of the first stage is loaded, but the BROM
>>>> +      re-enters at the same address/to the same code as previously.
>>>> +
>>>> +      This enables support code in the BOOT0 hook for the TPL stage
>>>> +      to allow multiple entries.
>>>> +
>>>> config SPL_MMC_SUPPORT
>>>> default y if !SPL_ROCKCHIP_BACK_TO_BROM
>