[U-Boot] [RFC] mmc: fsl_esdhc: Do not set high speed mode on MX25 and MX51

[Benoît Thébaudeau]

Hi Fabio,

On Wed, Oct 18, 2017 at 7:35 PM, Fabio Estevam <festevam at gmail.com> wrote:
> On Wed, Oct 18, 2017 at 2:56 PM, Benoît Thébaudeau <benoit at wsystem.com> wrote:
>
>> I can tell you what to use for imx25pdk if you give me the pads used by the
>> eSDHC instance in question here.
>
> mx25pdk uses the POR default IOMUX settings for sdhc1:

Can you try with this?

static const iomux_v3_cfg_t sdhc1_pads[] = {
NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, PAD_CTL_SRE_FAST),
NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, PAD_CTL_PUS_47K_UP |
PAD_CTL_SRE_FAST),
NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, PAD_CTL_PUS_47K_UP |
PAD_CTL_SRE_FAST),
NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, PAD_CTL_PUS_47K_UP |
PAD_CTL_SRE_FAST),
NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, PAD_CTL_PUS_47K_UP |
PAD_CTL_SRE_FAST),
NEW_PAD_CTRL(MX25_PAD_CTL_GRP_DSE_SDHC1, PAD_CTL_DSE_HIGH),
};

If you scope the SD clock during U-Boot HS SD transfers, do you get 48
MHz as expected?

Best regards,
Benoît