[U-Boot] [PATCH 7/9] x86: braswell: cherryhill: Update dts for SPI lock down

[Bin Meng]

Intel Braswell FSP requires SPI controller settings to be locked down,
let's do this in the chrryhill.dts and remove previous Kconfig option.

Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
---

 arch/x86/cpu/braswell/Kconfig | 4 ----
 arch/x86/dts/cherryhill.dts   | 1 +
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/x86/cpu/braswell/Kconfig b/arch/x86/cpu/braswell/Kconfig
index 616f228..31ac279 100644
--- a/arch/x86/cpu/braswell/Kconfig
+++ b/arch/x86/cpu/braswell/Kconfig
@@ -31,8 +31,4 @@ config FSP_ADDR
 	hex
 	default 0xfff20000
 
-config FSP_LOCKDOWN_SPI
-	bool
-	default y
-
 endif
diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts
index 840a669..41e72f3 100644
--- a/arch/x86/dts/cherryhill.dts
+++ b/arch/x86/dts/cherryhill.dts
@@ -143,6 +143,7 @@
 				#address-cells = <1>;
 				#size-cells = <0>;
 				compatible = "intel,ich9-spi";
+				intel,spi-lock-down;
 
 				spi-flash at 0 {
 					#address-cells = <1>;
-- 
2.7.4