[U-Boot] [RFC] mmc: fsl_esdhc: Do not set high speed mode on MX25 and MX51

[Fabio Estevam]

Hi Benoît,

On Wed, Oct 18, 2017 at 6:10 PM, Benoît Thébaudeau
<benoit.thebaudeau.dev at gmail.com> wrote:

> Can you try with this?
>
> static const iomux_v3_cfg_t sdhc1_pads[] = {
> NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
> NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, PAD_CTL_SRE_FAST),
> NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, PAD_CTL_PUS_47K_UP |
> PAD_CTL_SRE_FAST),
> NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, PAD_CTL_PUS_47K_UP |
> PAD_CTL_SRE_FAST),
> NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, PAD_CTL_PUS_47K_UP |
> PAD_CTL_SRE_FAST),
> NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, PAD_CTL_PUS_47K_UP |
> PAD_CTL_SRE_FAST),
> NEW_PAD_CTRL(MX25_PAD_CTL_GRP_DSE_SDHC1, PAD_CTL_DSE_HIGH),
> };

Unfortunately it does not help. Same error:

U-Boot 2017.11-rc2-00001-g1f16d26-dirty (Oct 19 2017 - 09:47:25 -0200)

CPU:   Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR
Board: MX25PDK
I2C:   ready
DRAM:  64 MiB
No arch specific invalidate_icache_all available!
MMC:   FSL_SDHC: 0
*** Warning - read failed, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   FEC
Hit any key to stop autoboot:  0
=> saveenv
Saving Environment to MMC...
Writing to MMC(0)... failed
=> saveenv
Saving Environment to MMC...
Writing to MMC(0)... failed
=>

I don't think it is an IOMUX issue as the kernel has no issues in with
SD high speed card and it uses the same IOMUX settings from U-Boot.

> If you scope the SD clock during U-Boot HS SD transfers, do you get 48
> MHz as expected?

I do see 48MHz.

I would be interested to see if you can get an SD card high speed to
work with mainline U-Boot on your board.

On my tests I need to force it 25MHz operation to be able to use the SD card.

Thanks