[U-Boot] [PATCH 7/8] rockchip: evb-rk3328: enable defconfig options for TPL/SPL

[Kever Yang]

Enable driver options for TPL/SPL in evb-rk3328_defconfig.

Signed-off-by: Kever Yang <kever.yang at rock-chips.com>
---

 configs/evb-rk3328_defconfig | 47 +++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 44 insertions(+), 3 deletions(-)

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index ddcc868..c0b8d0b 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -1,11 +1,38 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ROCKCHIP_RK3328=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk3328/u-boot-tpl.lds"
+CONFIG_TPL_TEXT_BASE=0xff091000
+CONFIG_TPL_STACK=0xff098000
+CONFIG_TPL_MAX_SIZE=28672
+CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3328/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_TPL=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL_PRESENT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
@@ -13,14 +40,23 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
@@ -28,21 +64,25 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3328=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
-CONFIG_DM_REGULATOR=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
@@ -59,4 +99,5 @@ CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
-- 
1.9.1