[U-Boot] [PATCH v4 00/20] Add FPGA, SDRAM, SPL loadfs U-boot & booting to console

tien.fong.chee at intel.com tien.fong.chee at intel.com
Tue Oct 31 10:42:04 UTC 2017


From: Tien Fong Chee <tien.fong.chee at intel.com>

This patchset adding FPGA and SDRAM drivers, enable fpga loadfs to program FPGA
, SPL loading U-boot and booting to U-boot console. This version mainly resolved
comments from Dinh and Marek in [v3].
This series is working on top of u-boot-socfpga.git -
 http://git.denx.de/u-boot-socfpga.git .

[v3]: https://www.mail-archive.com/u-boot@lists.denx.de/msg266981.html

v3 -> v4 changes:
-----------------
- Created and improving generic firmware loader
- Improved commit messages and header.
- Fixed typo.
- Changed unsigned long long to u64
- Changed printf to puts and error.

Patchset history
----------------
[v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg261831.html
[v2]: https://www.mail-archive.com/u-boot@lists.denx.de/msg265192.html

Tien Fong Chee (20):
  ARM: socfpga: Description on FPGA RBF properties at Arria 10 FPGA
    manager
  dts: Add FPGA bitstream properties to Arria 10 DTS
  arm: socfpga: Add Arria 10 SoCFPGA programming interface
  dts: Enable fpga-mgr node build for Arria 10 SPL
  fs: Enable generic filesystems interface support in SPL.
  common: Generic firmware loader for file system
  arm: socfpga: Fix with the correct polling on bit is set
  arm: socfpga: Add FPGA drivers for Arria 10 FPGA loadfs
  arm: socfpga: Rename the gen5 sdram driver to more specific name
  arm: socfpga: Add DRAM bank size initialization function
  arm: socfpga: Add DDR driver for Arria 10
  configs: Add DDR Kconfig support for Arria 10
  arm: socfpga: Enable SPL memory allocation
  arm: socfpga: Improve comments for Intel SoCFPGA program header
  arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
  arm: socfpga: Adding clock frequency info for U-Boot
  arm: socfpga: Adding SoCFPGA info for both SPL and U-Boot
  arm: socfpga: Remove static declaration on spl_mmc_find_device
    function
  arm: socfpga: Enable DDR working
  arm: socfpga: Enable SPL booting U-boot

 arch/arm/dts/socfpga_arria10.dtsi                  |   6 +
 arch/arm/mach-socfpga/Kconfig                      |   1 +
 arch/arm/mach-socfpga/Makefile                     |   1 +
 arch/arm/mach-socfpga/board.c                      |  18 +
 arch/arm/mach-socfpga/fpga_manager_arria10.c       | 132 ++++
 arch/arm/mach-socfpga/include/mach/boot0.h         |  11 +-
 .../include/mach/fpga_manager_arria10.h            |  32 +
 arch/arm/mach-socfpga/include/mach/sdram.h         | 434 +-----------
 arch/arm/mach-socfpga/include/mach/sdram_arria10.h |   2 +
 .../include/mach/{sdram.h => sdram_gen5.h}         |   6 +-
 arch/arm/mach-socfpga/misc_arria10.c               |   5 -
 arch/arm/mach-socfpga/spl.c                        |  54 ++
 cmd/fpga.c                                         |   2 +-
 common/Makefile                                    |   7 +-
 common/spl/Kconfig                                 |   8 +
 common/spl/spl_mmc.c                               |   2 +-
 common/splash_source.c                             | 110 +++-
 configs/socfpga_arria10_defconfig                  |  58 +-
 doc/README.SPL                                     |   1 +
 .../fpga/altera-socfpga-a10-fpga-mgr.txt           |  11 +
 drivers/ddr/altera/Kconfig                         |   2 +-
 drivers/ddr/altera/Makefile                        |   3 +-
 drivers/ddr/altera/sdram_arria10.c                 | 733 +++++++++++++++++++++
 drivers/ddr/altera/{sdram.c => sdram_gen5.c}       |   0
 drivers/fpga/altera.c                              |  40 +-
 drivers/fpga/fpga.c                                |   8 +
 drivers/fpga/socfpga_arria10.c                     | 337 +++++++++-
 fs/Makefile                                        |   1 +
 include/altera.h                                   |   6 +
 include/configs/socfpga_arria10_socdk.h            |   3 +
 include/configs/socfpga_common.h                   |  23 +-
 include/fpga.h                                     |   2 +
 include/spl.h                                      |   2 +
 include/splash.h                                   |   3 +
 34 files changed, 1575 insertions(+), 489 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/fpga_manager_arria10.c
 copy arch/arm/mach-socfpga/include/mach/{sdram.h => sdram_gen5.h} (99%)
 create mode 100644 drivers/ddr/altera/sdram_arria10.c
 rename drivers/ddr/altera/{sdram.c => sdram_gen5.c} (100%)

-- 
2.2.0



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