[U-Boot] [PATCH v4 13/20] arm: socfpga: Enable SPL memory allocation
tien.fong.chee at intel.com
tien.fong.chee at intel.com
Tue Oct 31 10:42:14 UTC 2017
From: Tien Fong Chee <tien.fong.chee at intel.com>
Enable memory allocation in SPL for preparation to enable FAT
in SPL. Memory allocation is needed by FAT to work properly.
Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
Reviewed-by: Dinh Nguyen <dinguyen at kernel.org>
---
include/configs/socfpga_common.h | 22 +++++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 0d1cde6..218eb05 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -274,17 +274,33 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
/*
* SPL
*
- * SRAM Memory layout:
+ * SRAM Memory layout for gen 5:
*
* 0xFFFF_0000 ...... Start of SRAM
* 0xFFFF_xxxx ...... Top of stack (grows down)
* 0xFFFF_yyyy ...... Malloc area
* 0xFFFF_zzzz ...... Global Data
* 0xFFFF_FF00 ...... End of SRAM
+ *
+ * SRAM Memory layout for Arria 10:
+ * 0xFFE0_0000 ...... Start of SRAM (bottom)
+ * 0xFFEx_xxxx ...... Top of stack (grows down to bottom)
+ * 0xFFEy_yyyy ...... Global Data
+ * 0xFFEz_zzzz ...... Malloc area (grows up to top)
+ * 0xFFE3_FFFF ...... End of SRAM (top)
*/
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE
+#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
+/* SPL memory allocation configuration, this is for FAT implementation */
+#ifndef CONFIG_SYS_SPL_MALLOC_START
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
+#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \
+ CONFIG_SYS_SPL_MALLOC_SIZE + \
+ CONFIG_SYS_INIT_RAM_ADDR)
+#endif
+#endif
/* SPL SDMMC boot support */
#ifdef CONFIG_SPL_MMC_SUPPORT
@@ -314,7 +330,11 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
/*
* Stack setup
*/
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
+#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
+#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START
+#endif
/* Extra Environment */
#ifndef CONFIG_SPL_BUILD
--
2.2.0
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