[U-Boot] [upstream-release] [PATCH v2 3/7] misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms

[Bharat Bhushan]

> -----Original Message-----
> From: upstream-release-bounces at linux.freescale.net [mailto:upstream-
> release-bounces at linux.freescale.net] On Behalf Of Laurentiu Tudor
> Sent: Tuesday, July 3, 2018 5:42 PM
> To: York Sun <york.sun at nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushwaha at nxp.com>; u-boot at lists.denx.de
> Cc: Laurentiu Tudor <laurentiu.tudor at nxp.com>
> Subject: [upstream-release] [PATCH v2 3/7] misc: fsl_portals: setup
> QMAN_BAR{E} also on ARM platforms
> 
> QMAN_BAR{E} register setup was disabled on ARM platforms,
> however the register does need to be set. Add code that
> sets it up on ARMs.
> 
> Signed-off-by: Laurentiu Tudor <laurentiu.tudor at nxp.com>
> ---
>  drivers/misc/fsl_portals.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
> index 7c22b8d209..5b1233740b 100644
> --- a/drivers/misc/fsl_portals.c
> +++ b/drivers/misc/fsl_portals.c
> @@ -24,14 +24,19 @@ void setup_qbman_portals(void)
>  				CONFIG_SYS_BMAN_SWP_ISDR_REG;
>  	void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE +
>  				CONFIG_SYS_QMAN_SWP_ISDR_REG;
> -#ifdef CONFIG_PPC
>  	struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
> 
>  	/* Set the Qman initiator BAR to match the LAW (for DQRR stashing)
> */
> +#ifdef CONFIG_PPC32
>  #ifdef CONFIG_PHYS_64BIT
>  	out_be32(&qman->qcsp_bare,
> (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32));
>  #endif
>  	out_be32(&qman->qcsp_bar,
> (u32)CONFIG_SYS_QMAN_MEM_PHYS);
> +#else
> +#ifdef CONFIG_PHYS_64BIT
> +	out_be32(&qman->qcsp_bare,
> (u32)(CONFIG_SYS_QMAN_MEM_BASE >> 32));
> +#endif
> +	out_be32(&qman->qcsp_bar,
> (u32)CONFIG_SYS_QMAN_MEM_BASE);
>  #endif

Can we have same hash define name for PPC and non-PPC?
We do not need then if-else 

Thanks
-Bharat

>  #ifdef CONFIG_FSL_CORENET
>  	int i;
> --
> 2.17.1
> 
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