[U-Boot] [PATCH 1/3] Revert "ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK"

[lzenz at dh-electronics.de]

From: Ludwig Zenz <lzenz at dh-electronics.de>

This reverts commit a637fe6f27fd4c19ef9f43a5f871c244581422ac.

The DDR DRAM calibration was enhanced by write leveling correction code.
It can be used with T-topology now.

Signed-off-by: Ludwig Zenz <lzenz at dh-electronics.de>
---
 board/dhelectronics/dh_imx6/dh_imx6_spl.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
index dffe4eb..beda389 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
@@ -384,6 +384,10 @@ void board_init_f(ulong dummy)
 				  &dhcom6sdl_grp_ioregs);
 	mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr);
 
+	/* Perform DDR DRAM calibration */
+	udelay(100);
+	mmdc_do_dqs_calibration(&dhcom_ddr_info);
+
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
-- 
2.7.4