[U-Boot] [PATCH] ARM: dts: Resync OMAP3 and omap36xx with Linux 4.18-RC4
Adam Ford
aford173 at gmail.com
Tue Jul 10 01:14:25 UTC 2018
There have been several minor changes to the OMAP3.dtsi, so this
patch re-syncs it with Linux. An addition include/dt-binding was
also brought with it.
Signed-off-by: Adam Ford <aford173 at gmail.com>
diff --git a/arch/arm/dts/omap3.dtsi b/arch/arm/dts/omap3.dtsi
index 56c94729bb..4043ecb380 100644
--- a/arch/arm/dts/omap3.dtsi
+++ b/arch/arm/dts/omap3.dtsi
@@ -215,6 +215,7 @@
#dma-cells = <1>;
dma-channels = <32>;
dma-requests = <96>;
+ ti,hwmods = "dma";
};
gpio1: gpio at 48310000 {
@@ -287,7 +288,6 @@
uart1: serial at 4806a000 {
compatible = "ti,omap3-uart";
reg = <0x4806a000 0x2000>;
- reg-shift = <2>;
interrupts-extended = <&intc 72>;
dmas = <&sdma 49 &sdma 50>;
dma-names = "tx", "rx";
@@ -298,7 +298,6 @@
uart2: serial at 4806c000 {
compatible = "ti,omap3-uart";
reg = <0x4806c000 0x400>;
- reg-shift = <2>;
interrupts-extended = <&intc 73>;
dmas = <&sdma 51 &sdma 52>;
dma-names = "tx", "rx";
@@ -309,7 +308,6 @@
uart3: serial at 49020000 {
compatible = "ti,omap3-uart";
reg = <0x49020000 0x400>;
- reg-shift = <2>;
interrupts-extended = <&intc 74>;
dmas = <&sdma 53 &sdma 54>;
dma-names = "tx", "rx";
@@ -559,6 +557,7 @@
dma-names = "tx", "rx";
clocks = <&mcbsp4_fck>;
clock-names = "fck";
+ #sound-dai-cells = <0>;
status = "disabled";
};
@@ -589,20 +588,6 @@
dma-names = "rx";
};
- smartreflex_core: smartreflex at 480cb000 {
- compatible = "ti,omap3-smartreflex-core";
- ti,hwmods = "smartreflex_core";
- reg = <0x480cb000 0x400>;
- interrupts = <19>;
- };
-
- smartreflex_mpu_iva: smartreflex at 480c9000 {
- compatible = "ti,omap3-smartreflex-iva";
- ti,hwmods = "smartreflex_mpu_iva";
- reg = <0x480c9000 0x400>;
- interrupts = <18>;
- };
-
timer1: timer at 48318000 {
compatible = "ti,omap3430-timer";
reg = <0x48318000 0x400>;
@@ -717,6 +702,7 @@
compatible = "ti,ohci-omap3";
reg = <0x48064400 0x400>;
interrupts = <76>;
+ remote-wakeup-connected;
};
usbhsehci: ehci at 48064800 {
diff --git a/arch/arm/dts/omap36xx.dtsi b/arch/arm/dts/omap36xx.dtsi
index a0f2d9e805..6fb23ada1f 100644
--- a/arch/arm/dts/omap36xx.dtsi
+++ b/arch/arm/dts/omap36xx.dtsi
@@ -8,6 +8,7 @@
* kind, whether express or implied.
*/
+#include <dt-bindings/bus/ti-sysc.h>
#include <dt-bindings/media/omap3-isp.h>
#include "omap3.dtsi"
@@ -34,7 +35,6 @@
uart4: serial at 49042000 {
compatible = "ti,omap3-uart";
reg = <0x49042000 0x400>;
- reg-shift = <2>;
interrupts = <80>;
dmas = <&sdma 81 &sdma 82>;
dma-names = "tx", "rx";
@@ -94,6 +94,51 @@
compatible = "ti,omap36xx-bandgap";
#thermal-sensor-cells = <0>;
};
+
+ target-module at 480cb000 {
+ compatible = "ti,sysc-omap3630-sr", "ti,sysc";
+ ti,hwmods = "smartreflex_core";
+ reg = <0x480cb038 0x4>;
+ reg-names = "sysc";
+ ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ clocks = <&sr2_fck>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x480cb000 0x001000>;
+
+ smartreflex_core: smartreflex at 0 {
+ compatible = "ti,omap3-smartreflex-core";
+ reg = <0 0x400>;
+ interrupts = <19>;
+ };
+ };
+
+ target-module at 480c9000 {
+ compatible = "ti,sysc-omap3630-sr", "ti,sysc";
+ ti,hwmods = "smartreflex_mpu_iva";
+ reg = <0x480c9038 0x4>;
+ reg-names = "sysc";
+ ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ clocks = <&sr1_fck>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x480c9000 0x001000>;
+
+
+ smartreflex_mpu_iva: smartreflex at 480c9000 {
+ compatible = "ti,omap3-smartreflex-mpu-iva";
+ reg = <0 0x400>;
+ interrupts = <18>;
+ };
+ };
};
thermal_zones: thermal-zones {
diff --git a/include/dt-bindings/bus/ti-sysc.h b/include/dt-bindings/bus/ti-sysc.h
new file mode 100644
index 0000000000..2c005376ac
--- /dev/null
+++ b/include/dt-bindings/bus/ti-sysc.h
@@ -0,0 +1,22 @@
+/* TI sysc interconnect target module defines */
+
+/* Generic sysc found on omap2 and later, also known as type1 */
+#define SYSC_OMAP2_CLOCKACTIVITY (3 << 8)
+#define SYSC_OMAP2_EMUFREE (1 << 5)
+#define SYSC_OMAP2_ENAWAKEUP (1 << 2)
+#define SYSC_OMAP2_SOFTRESET (1 << 1)
+#define SYSC_OMAP2_AUTOIDLE (1 << 0)
+
+/* Generic sysc found on omap4 and later, also known as type2 */
+#define SYSC_OMAP4_DMADISABLE (1 << 16)
+#define SYSC_OMAP4_FREEEMU (1 << 1) /* Also known as EMUFREE */
+#define SYSC_OMAP4_SOFTRESET (1 << 0)
+
+/* SmartReflex sysc found on 36xx and later */
+#define SYSC_OMAP3_SR_ENAWAKEUP (1 << 26)
+
+/* SYSCONFIG STANDBYMODE/MIDLEMODE/SIDLEMODE supported by hardware */
+#define SYSC_IDLE_FORCE 0
+#define SYSC_IDLE_NO 1
+#define SYSC_IDLE_SMART 2
+#define SYSC_IDLE_SMART_WKUP 3
--
2.17.1
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